W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 48
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W83697HFFDC
Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83697HFFDC.pdf
(167 pages)
- Current page: 48 of 167
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Media ID1 Media ID0 (Bit 7, 6):
These two bits are read only. These two bits reflect the value of CR8 bit 3, 2.
Drive type ID1 Drive type ID0 (Bit 5, 4):
These two bits reflect two of the bits of CR7. Which two bits are reflected depends on the last drive
selected in the DO REGISTER.
Flop py Boot drive 1, 0 (Bit 3, 2):
These two bits reflect the value of CR8 bit 1, 0.
Tape Sel 1, Tape Sel 0 (Bit 1, 0):
These two bits assign a logical drive number to the tape drive. Drive 0 is not available as a tape drive and
is reserved as the floppy disk boot drive.
3.2.5
The Main Status Register is used to control the flow of data between the microprocessor and the
controller. The bit definitions for this register are as follows:
7
6
Main Status Register (MS Register) (Read base address + 4)
5
4
3
2
TAPE SEL 1
1
0
0
1
1
0
FDD 2 Busy, (D2B = 1), FDD number 2 is in the SEEK mode.
FDD 0 Busy, (D0B = 1), FDD number 0 is in the SEEK mode.
FDD 1 Busy, (D1B = 1), FDD number 1 is in the SEEK mode.
FDD 3 Busy, (D3B = 1), FDD number 3 is in the SEEK mode.
FDC Busy, (CB). A read or write command is in the process when CB = HIGH.
Non-DMA mode, the FDC is in the non-DMA mode, this bit is set only during the
execution phase in non-DMA mode.
Transition to LOW state indicates execution phase has ended.
DATA INPUT/OUTPUT, (DIO). If DIO= HIGH then transfer is from Data Register to the processor.
Request for Master (RQM). A high on this bit indicates Data Register is ready to send or receive data to or from the processor.
If DIO = LOW then transfer is from processor to Data Register.
TAPE SEL 0
0
1
0
1
- 39 -
DRIVE SELECTED
None
Publication Release Date: Feb. 2002
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W83697HF/F
Revision 0.70
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