W83697HFFDC Information Storage Devices, Inc, W83697HFFDC Datasheet - Page 74
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W83697HFFDC
Manufacturer Part Number
W83697HFFDC
Description
LPC Interface I/o Plus Game/midi Port, Fan Control, Flash ROM I/f
Manufacturer
Information Storage Devices, Inc
Datasheet
1.W83697HFFDC.pdf
(167 pages)
- Current page: 74 of 167
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6.2.1 Data Swapper
The system microprocessor can read the contents of the printer's data latch by reading the data
swapper.
6.2.2 Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the printer status
buffer. The bit definitions are as follows:
Bit 7: This signal is active during data entry, when the printer is off-line during printing, when the print
Bit 6: This bit represents the current state of the printer's
Bit 5: Logical 1 means the printer has detected the end of paper.
Bit 4: Logical 1 means the printer is selected.
Bit 3: Logical 0 means the printer has encountered an error condition.
Bit 1, 2: These two bits are not implemented and are logic one during a read of the status register.
Bit 0: This bit is valid in EPP mode only. It indicates that a 10
head is changing position, or during an error state. When this signal is active, the printer is busy
and cannot accept data.
received a character and is ready to accept another. Normally, this signal will be active for
approximately 5 microseconds before
bus. A logic 0 means that no time-out error has occurred; a logic 1 means that a time-out error
has been detected. Writing a logic 1 to this bit will clear the time-out status bit; writing a logic 0
has no effect.
7
6
5
BUSY#
4
- 65 -
3
2
1
stops.
1
1
0
ACK#
TMOUT
ERROR
SLCT
PE
ACK
BUSY
S time-out has occurred on the EPP
signal. A 0 means the printer has
Publication Release Date: Feb. 2002
W83697HF/F
Revision 0.70
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