w83795g Winbond Electronics Corp America, w83795g Datasheet - Page 33

• Manufacturer Part Number: w83795g
• Description: Nuvoton H/w Monitor
• Manufacturer: Winbond Electronics Corp America

8.2.1.2.
Configuration Register controls the system reset source, stop, power down and warning output mode.
Location: Bank 0 Address 01
Type:
Reset:
Default Value: 11
BIT
4-3
7
6
5
2
1
0
Read / Write
Bit 0~1 & 3~4 & 7:
Bit 5 & 6:
Configuration Register (CONFIG)
INIT.
Address register. This bit clears itself since the power-on default is zero.
SYSRST_MD.
0 = no operation when the SYSRSTIN# input signal is issued.
1 = the whole chip will be reset when the SYSRSTIN# input signal is issued.
RST_VDD_MD.
0 = no operation when 3VDD is up.
1 = the whole chip will be reset when 3VDD is up.
CLKSel.
Select CLKIN clock input.
00
01
10
11
Config48.
Package version (power on trapping),
0 = 64 pin package for W83795G
1 = 48 pin package for W83795ADG
INT_Clear.
Registers. The device will stop monitoring at last channel. It will resume upon clearing of
this bit.
START.
1
1
Setting to one restores power-on default values to all registers, except the Serial Bus
A one disables the SMI# outputs without affecting the contents of Interrupt Status
BIN
BIN
BIN
BIN
Init Reset (CR01.Bit7) is set,
3VDD Rising @ RST_VDD_MD (CR01.Bit5) set,
SYSRSTIN# Falling @ SYSRST_MD (CR01.Bit6) set.
3VSB Rising,
3VSB Rising,
15
= CLKIN clock input is 14.318MHz.
= CLKIN clock input is 24MHz.
= CLKIN clock input is 33MHz. (Default)
= CLKIN clock input is 48MHz.
HEX
HEX
is for W83795G
is for W83795ADG
0
1
HEX
5C
5E
HEX
HEX
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DESCRIPTION
W83795G/ADG
Revision 1.41
Aug/2/2010