w83795g Winbond Electronics Corp America, w83795g Datasheet - Page 53

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w83795g

Manufacturer Part Number
w83795g
Description
Nuvoton H/w Monitor
Manufacturer
Winbond Electronics Corp America
Datasheet

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8.6.1.3.
Setting to one will disable the corresponding interrupt sources. Clearing to 0 will enable that
source.
SMI MASK6 CR4D.Bit7 is CLR_CHS (Clear Chassis), writing this bit to one will clear the internal
caseopen latch. After the latch is cleared, CLR_CHS will self-reset to 0.
Location:
Type:
Reset:
(Bit 2:0 VSEN9-VSEN11 are not for W83795ADG)
DEFAULT
DEFAULT
DEFAULT
NAME
NAME
NAME
BIT
BIT
BIT
SMI MASK1 - Bank 0 Address 48
SMI MASK2 - Bank 0 Address 49
SMI MASK3 - Bank 0 Address 4A
SMI MASK4 - Bank 0 Address 4B
SMI MASK5 - Bank 0 Address 4C
SMI MASK6 - Bank 0 Address 4D
SMI MASK7 - Bank 0 Address 4E
Read / Write
Init Reset (CR01.Bit7) is set,
SMI Mask Register (SMI MASK)
3VSB Rising.
3VDD Rising @ RST_VDD_MD (CR01.Bit5) set,
SYSRSTIN# Falling @ SYSRST_MD (CR01.Bit6) set.
Reserved
VSEN8
7
0
Reserved
7
0
7
0
VSEN7
6
0
VBAT
6
0
6
1
TART6
VSEN6
5
0
3VSB
HEX
HEX
HEX
HEX
HEX
HEX
HEX
5
0
5
0
SMI MASK1
SMI MASK2
SMI MASK3
SMI STS7
TART5
- 53 –
VSEN5
3VDD
4
0
4
0
4
0
TART4
VSEN4
VTT
3
0
3
0
3
0
VSEN11
VSEN3
TART3
2
0
2
0
W83795G/ADG
2
0
VSEN10
VSEN2
TART2
1
0
1
0
1
0
Revision 1.41
Aug/2/2010
VSEN1
VSEN9
interrupt
TART1
0
0
0
0
0
0

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