attiny13-20ss ATMEL Corporation, attiny13-20ss Datasheet - Page 69

• Manufacturer Part Number: attiny13-20ss
• Description: 8-bit Microcontroller With 1k Bytes In-system Programmable Flash - Atmel Corporation
• Manufacturer: ATMEL Corporation

8-bit Timer/Counter
Register Description
Timer/Counter Control
Register A – TCCR0A
2535G–AVR–01/07
• Bits 7:6 – COM01A:0: Compare Match Output A Mode
These bits control the Output Compare pin (OC0A) behavior. If one or both of the
COM0A1:0 bits are set, the OC0A output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit cor-
responding to the OC0A pin must be set in order to enable the output driver.
When OC0A is connected to the pin, the function of the COM0A1:0 bits depends on the
WGM02:0 bit setting. Table 26 shows the COM0A1:0 bit functionality when the
WGM02:0 bits are set to a normal or CTC mode (non-PWM).
Table 26. Compare Output Mode, non-PWM Mode
Table 27 shows the COM0A1:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Table 27. Compare Output Mode, Fast PWM Mode
Note:
Bit
Read/Write
Initial Value
COM01
COM01
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0A equals TOP and COM0A1 is set. In this case,
the Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 64 for more details.
COM0A1
R/W
COM00
COM00
7
0
0
1
0
1
0
1
0
1
COM0A0
R/W
6
0
Description
Normal port operation, OC0A disconnected.
Toggle OC0A on Compare Match
Clear OC0A on Compare Match
Set OC0A on Compare Match
Description
Normal port operation, OC0A disconnected.
WGM02 = 0: Normal Port Operation, OC0A Disconnected.
WGM02 = 1: Toggle OC0A on Compare Match.
Clear OC0A on Compare Match, set OC0A at TOP
Set OC0A on Compare Match, clear OC0A at TOP
COM0B1
R/W
5
0
COM0B0
R/W
4
0
R
0
3
–
(1)
R
2
–
0
WGM01
R/W
1
0
WGM00
R/W
0
0
TCCR0A
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