ak5365 AKM Semiconductor, Inc., ak5365 Datasheet - Page 16

• Manufacturer Part Number: ak5365
• Description: 24-bit 96khz ?? Adc With Selector/pga/alc
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK5365 is placed in the power-down mode by bringing PDN pin = “L” and the digital filter is also reset at the same
time. This reset should always be done after power-up. An analog initialization cycle starts after exiting the power-down
mode. Therefore, the output data SDTO becomes available after 516 cycles of LRCK.
(1) Power-up Sequence 1
MS0164-E-01
Power-up/down
- INITA : Initializing period of ADC analog section (516/fs).
- FI :
- PDN : Power down state.
- The period of (1) should be min. 150ns in Figure 3.
Power Supply
PDN pin
ADC Internal State
IPGA
SDTO
External clocks
in slave mode
External clocks
in master mode
BICK, LRCK
in master mode
Fade in. After exiting power down, IPGA value fades in.
Fixed to “L”
Figure 3. Power-up Sequence 1
PDN
00H
(1)
“0”
INITA
- 16 -
00H
The clocks can be stopped.
The clocks can be stopped.
MCLK, LRCK, BICK
7FH
FI
MCLK
BICK, LRCK
Normal
Output
7FH
[AK5365
2002/08
]