ak5365 AKM Semiconductor, Inc., ak5365 Datasheet - Page 32

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ak5365

Manufacturer Part Number
ak5365
Description
24-bit 96khz ?? Adc With Selector/pga/alc
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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Manufacturer:
AKM
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ASAHI KASEI
PWN: Power down control
SEL2-0:
SMUTE: Soft Mute control
CKS1-0: Master clock frequency select (see Table 2)
DIF:
MS0164-E-01
Addr
Addr
Addr
00H
01H
02H
Register Definitions
Audio interface format (see Table 3)
Register Name
Power Down & Reset Control
Register Name
Input Selector Control
Register Name
Clock & Format Control
0 : Power down. All registers are not initialized.
1 : Normal Operation (Default)
Input selector (see Table 6)
Initial values are “000”.
0 : Normal Operation (Default)
1 : SDTO outputs soft-muted.
Initial values are “00”.
Initial values are “0”.
When CTRL pin is “H”, audio interface format is fixed to I
Default
Default
Default
“0” powers down all sections and then both IPGA and ADC do not operate. The contents of all register
are not initialized and enabled to write to the registers.
When MCLK and LRCK are changed, it is not necessary to reset by the PDN pin or PWN bit because the
AK5365 builds in reset-free circuit. However, it can be reduced the noise by reset.
D7
D7
D7
0
0
0
0
0
0
D6
D6
D6
0
0
0
0
0
0
- 32 -
D5
D5
D5
0
0
0
0
0
0
D4
D4
D4
0
0
0
0
0
0
2
S compatible.
DIF
D3
D3
D3
0
0
0
0
0
CKS1
SEL2
D2
D2
D2
0
0
0
0
CKS0
SEL1
D1
D1
D1
0
0
0
0
[AK5365
SMUTE
2002/08
SEL0
PWN
D0
D0
D0
1
0
0
]

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