ak5365 AKM Semiconductor, Inc., ak5365 Datasheet - Page 22

• Manufacturer Part Number: ak5365
• Description: 24-bit 96khz ?? Adc With Selector/pga/alc
• Manufacturer: AKM Semiconductor, Inc.

[AK5365
ASAHI KASEI
]
ALC Operation
[1] ALC Limiter Operation
When the ALC limiter is enabled, and either Lch or Rch exceed the ALC limiter detection level (LMTH bit), the IPGA
value is attenuated by the amount defined in the ALC limiter ATT step (LMAT bit) automatically. Then the IPGA value is
changed commonly for L/R channels.
When the ZELMN bit = “1”, the timeout period is set by the LTM1-0 bits. The operation for attenuation is done
continuously until the input signal level becomes the ALC limiter detection level (LMTH bit) or less. If the ALC bit does
not change into “0” or the ALC pin does not change into “L” after completing the attenuation, the attenuation operation
repeats until the input signal level equals or exceeds the ALC limiter detection level (LMTH bit).
When the ZELMN bit = “0”, the timeout period is set by the ZTM1-0 bits. This enables the zero-crossing attenuation
function so that the IPGA value is attenuated at the zero-detect points of the waveform.
When FR bit = “1”, the ALC operation corresponds to the impulse noise in additional to the normal ALC operation. Then
if the impulse noise is supplied at ZELMN bit = “0”, the ALC operation becomes the faster period than a set of ZTM1-0
bits. In case of ZELMN bit = “1”, it becomes the same period as LTM1-0 bits. When FR bit = “0”, the ALC operation is the
normal ALC operation.
[2] ALC Recovery Operation
The ALC recovery refers to the amount of time that the AK5365 will allow a signal to exceed a predetermined limiting
value prior to enabling the limiting function. The ALC recovery operation uses the WTM1-0 bits to define the wait period
used after completing an ALC limiter operation. If the input signal does not exceed the “ALC Recovery Waiting Counter
Reset Level”, the ALC recovery operation starts. The IPGA value increases automatically during this operation up to the
reference level (REF7-0 bits). The ALC recovery operation is done at a period set by the WTM1-0 bits. Zero crossing is
detected during WTM1-0, the ALC recovery operation waits WTM1-0 period and the next recovery operation starts.
During the ALC recovery operation, when input signal level exceeds the ALC limiter detection level (LMTH bit), the ALC
recovery operation changes immediately into an ALC limiter operation.
In the case of “(Recovery waiting counter reset level)
Input Signal < Limiter detection level” during the ALC recovery
operation, the wait timer for the ALC recovery operation is reset. Therefore, in the case of “(Recovery waiting counter
reset level) > Input Signal”, the wait timer for the ALC recovery operation starts.
When the impulse noise is input at FR bit = “1”, the ALC recovery operation becomes faster than a normal recovery
operation. When the FR bit = “0”, the ALC recovery operation is done by normal period.
MS0164-E-01
2002/08
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