ak5365 AKM Semiconductor, Inc., ak5365 Datasheet - Page 21

• Manufacturer Part Number: ak5365
• Description: 24-bit 96khz ?? Adc With Selector/pga/alc
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
The AK5365 includes two independent channel analog volumes (IPGA) with 25 levels at 0.5dB steps located in front of
the ADC. The digital volume controls (DATT) have 128 levels (including MUTE) and is located after the ADC. Both the
analog and digital volumes are controlled through the same register address. When the MSB of the register is “1”, the
IPGA changes and when the MSB = “0”, the DATT changes.
The IPGA is a true analog volume control that improves the S/N ratio as seen in Table 10. Independent zero-crossing
detection is used to ensure level changes only occur during zero-crossings. If there are no zero-crossings, the level will then
change after a time-out period (Table 11); the time-out period scales with fs. If a new value is written to the IPGA register
before the IPGA changes at the zero crossing or time-out, the previous value becomes invalid. The timer (channel
independent) for time-out is reset and the timer restarts for new IPGA value.
The DATT is a pseudo-log volume that is linear-interpolated internally. When changing the level, the transition between
ATT values has 8031 levels and is done by soft changes, eliminating any switching noise.
[Writing operation at ALC Enable]
MS0164-E-01
Input Volume
Writing to the area over 80H (Table 17) of IPGL/R registers is ignored during ALC operation. After ALC is disabled,
the IPGA changes to the last written data by zero-crossing or time-out. In case of writing to the DATT area under 7FH
(Table 17) of IPGL/R registers, the DATT changes even if ALC is enabled.
ZTM1
0
0
1
1
fs=48kHz, A-weight
ZTM0
0
1
0
1
Table 11. Zero crossing timeout period
Zero crossing timeout period
Table 10. PGA+ADC S/N
103dB
1152/fs
2304/fs
4608/fs
0dB
288/fs
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Input Gain Setting
100dB
+6dB
@fs=48kHz
24ms
48ms
96ms
6ms
+12dB
96dB
Default
[AK5365
2002/08
]