m52s16161a Elite Semiconductor Memory Technology Inc., m52s16161a Datasheet - Page 22
m52s16161a
Manufacturer Part Number
m52s16161a
Description
512k X 16bit X 2banks Mobile Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
1.M52S16161A.pdf
(32 pages)
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ESMT
Write Interrupted by Precharge Command & Write Burst stop Cycle @ Burst Length =Full page
A 1 0 / A P
*Note: 1. Burst can’t end in full page mode, so auto precharge can’t issue.
Elite Semiconductor Memory Technology Inc.
C L O C K
A D D R
R A S
C A S
C K E
W E
D Q
D Q M
B A
C S
2. Data-in at the cycle of interrupted by precharge can not be written into the corresponding memory cell. It is defined by
3. Burst stop is valid at every burst length.
AC parameter of t
DQM at write interrupted by precharge command is needed to prevent invalid write.
Input data after Row precharge cycle will be masked internally.
R o w A c t i v e
0
( A - B a n k )
R A a
R A a
1
2
RDL
3
( A - B a n k )
W r i t e
.
D A a 0 D A a 1
C A a
4
5
D A a 2 D A a 3 D A a 4
6
7
B u r s t S t o p
8
t
9
B D L
H I G H
10
( A - B a n k )
W r i t e
D A b 0
C A b
11
D A b 1
12
D A b 2
13
D A b 3 D A b 4 D A b 5
14
Revision : 1.6
Publication Date : May 2009
M52S16161A
15
16
* N o t e 2
17
P r e c h a r g e
( A - B a n k )
18
t
R D L
: D o n ' t C a r e
22/32
19
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