f25l32pa Elite Semiconductor Memory Technology Inc., f25l32pa Datasheet - Page 13

• Manufacturer Part Number: f25l32pa
• Description: 3v Only 32 Mbit Serial Flash Memory With Dual
• Manufacturer: Elite Semiconductor Memory Technology Inc.

ESMT
Operation
Jedec Read ID
(JEDEC-ID)
Read ID (RDID)
Notes:
Elite Semiconductor Memory Technology Inc.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The Write-Enable (WREN) instruction and the Write-Status-Register (WRSR) instruction must work in conjunction of each
11. The Manufacture ID and Device ID output will repeat continuously until CE terminates the instruction.
12. Dual commands use bidirectional IO pins. D
13. Dual output data:
14. M
15. This instruction is recommended when using the Dual Mode bit feature.
Operation: S
X = Dummy Input Cycles (V
One bus cycle is eight clock periods.
Sector Earse addresses: use A
Block Earse addresses: use A
To continue programming to the next sequential address location, enter the 8-bit command, followed by the data to be
programmed.
The Read-Status-Register is continuous with ongoing clock cycles until terminated by a low to high transition on CE .
The Enable-Write-Status-Register (EWSR) instruction and the Write-Status-Register (WRSR) instruction must work in
conjunction of each other. The WRSR instruction must be executed immediately (very next bus cycle) after the EWSR
instruction to make both instructions effective.
The Read-Electronic-Signature is continuous with on going clock cycles until terminated by a low to high transition on CE .
The JEDEC-Read-ID is output first byte 8CH as manufacture ID; second byte 20H as top memory type; third byte 16H as
memory capacity.
other. The WRSR instruction must be executed immediately (very next bus cycle) after the WREN instruction to make both
instructions effective. Both EWSR and WREN can enable WRSR, user just need to execute one of it. A successful WRSR
can reset WREN.
IO
IO
IO
IO
9
7
-M
0
1
0
1
= (D
= (D
= (A
= (A
11
0
: Mode bits. Dual input address:
6
7
22
23
, D
, D
, A
, A
D
IN
4
5
OUT0
20
21
, D
, D
= Serial In, S
, A
, A
100
2
3
50
Max.
Freq
, D
, D
18
19
Bus Cycle-2
MHz
~
MHz
, A
, A
0
1
), (D
), (D
16
17
, A
, A
9FH
90H
6
7
Table 5: Device Operation Instruction - Continued
S
, D
, D
OUT
IL
14
15
IN
D
or V
, A
, A
4
5
MS
OUT1
, D
, D
MS
1
= Serial Out, Bus Cycle 1 = Op Code
12
13
S
Hi-Z
Hi-Z
-A
2
3
IH
-A
OUT
, A
, A
, D
, D
16
); - = Non-Applicable Cycles (Cycles are not necessary); cont. = continuous
12
, remaining addresses can be V
10
11
0
1
, remaining addresses can be V
)
)
, A
, A
00H
S
9
8
X
)
)
IN
OUT
(A
(A
2
and cont. are serial data out; others are serial data in.
6
7
, A
, A
S
8CH
Hi-Z
OUT
5
4
, A
, A
3
2
Bus Cycle-3
, A
, A
00H
1
S
0
X
, M
, M
IN
7
6
3
, M
, M
S
20H
Hi-Z
5
4
OUT
, M
, M
Bus Cycle
IL
IL
or V
or V
3
2
, M
, M
00H
01H
S
IH
X
IN
IH
1
0
)
)
4
1~3
S
Hi-Z
Hi-Z
16H
OUT
S
Publication Date: Mar. 2009
Revision: 1.0
X
X
-
IN
5
S
8CH
15H
OUT
-
F25L32PA
S
X
X
-
IN
6
S
8CH
15H
OUT
-
S
-
-
-
IN
13/36
N
S
OUT
-
-
-