mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 115

• Manufacturer Part Number: mt90503
• Description: 2048vc Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Address: 228h
Label: interrupt1_enable
Reset Value: 0000h
Address: 22Ch
Label: interrupt2_enable
Reset Value: 0000h
wheelreg_interrupt2_enable
mainreg_interrupt2_enable
miscreg_interrupt2_enable
clkrecovalarm_interrupt1_enable
cpureg_interrupt2_enable
utoreg_interrupt2_enable
clkreg_interrupt2_enable
txreg_interrupt2_enable
rxreg_interrupt2_enable
erroralarm_interrupt1_enable
aal0alarm_interrupt1_enable
casalarm_interrupt1_enable
tdmalarm_interrupt1_enable
Label
reserved
Label
Table 57 - Interrupt1 Enable Register (continued)
Position
Table 58 - Interrupt2 Enable Register
Bit
0
1
2
3
4
5
6
7
Position
Bit
10
12
13
14
15
11
Zarlink Semiconductor Inc.
Type
RW
RW
RW
RW
RW
RW
RW
RW
MT90503
Type
RW
RW
RW
RW
RW
RW
115
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is '1',
an interrupt will be generated on cpu_int[1].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
When '1' and the corresponding interrupt active is
'1', an interrupt will be generated on cpu_int[0].
Reserved. Must always be "0"
Description
Description
Data Sheet