mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 181

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mt90503

Manufacturer Part Number
mt90503
Description
2048vc Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mt90503AG
Manufacturer:
ISSI
Quantity:
2
Address: 86Ah
Label: pinmux_reg5
Reset Value: 0303h
Address: 880h
Label: diviclk0_reg0
Reset Value: 0300h
pinmux_local_netref_16m_sel
diviclk0_even_duty_cycle_selec
diviclk0_clk_divisor_load_now
diviclk0_output_invert_select
diviclk0_input_source_select
diviclk0_input_invert_select
diviclk0_clk_divisor_reset
reserved
reserved
reserved
reserved
reserved
Label
Label
t
Table 228 - Integer Clock Divisor0 0 Register
Position
15:14
13:8
Position
Bit
5:0
7:6
15:14
12:7
13:8
Bit
Table 227 - Pin Mux 5 Register
0
1
2
3
4
Zarlink Semiconductor Inc.
Type
RW
RO
RO
RO
Type
PUL
RW
RW
RW
RW
RW
RW
RW
MT90503
181
This field selects the local_16m reference feed into the
H.100 master circuit. See Table 28 - "Source Selection"
on page 89 for more details.
Reserved. Always read as "00"
Reserved. Always read as "0000_00"
Reserved. Always read as "00"
When this bit is written to '1', the integer clock divisor
0's division value will be loaded into the divisor.
When this bit is '0', the integer clock divisor 0 is put in
reset. Must be '1' for normal operation.
When '1', the duty cycle modifier will be enabled and
will generate a 50% duty cycle output.
When '1', the input of the integer clock divisor will be
inverted before being divided.
When '1', the output of the integer clock divisor will be
inverted before being sent out.
Reserved. Must always be "0000_00"
This field selects the input of the integer clock divisor.
See Table 28 - "Source Selection" on page 89 for
more details.
Reserved. Must always be "00"
Description
Description
Data Sheet

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