mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 162
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mt90503
Manufacturer Part Number
mt90503
Description
2048vc Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90503.pdf
(233 pages)
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5.5.7
Address: 616h
Label: wheel_inf_3
Reset Value: 0000h
Address: 700h
Label: control
Reset Value: 0000h
Address: 702h
Label: status
Reset Value: 0000h
always_diagnose
data_fifo_overflow
rxsarpip_overflow
RX_SAR Registers
test_status
wheelC_ena
wheelD_ena
wheelE_ena
wheelC_inf
wheelD_inf
wheelE_inf
reserved
reserved
Label
Label
Label
Table 171 - Scheduler Configuration & Enable 3 Register
Position
Position
Position
14:1
Bit
15
15:12
0
11:9
3:1
7:5
Bit
Bit
0
4
8
Table 172 - RX_SAR Control Register
0
1
Table 173 - RX_SAR Status Register
Type
RW
RW
TS
Zarlink Semiconductor Inc.
Type
Type
ROL
ROL
RW
RW
RW
RW
RW
RW
RW
MT90503
When '1', an error report structure will be generated for
every cell that arrives. Used for tests.
Reserved. Must always be "0000_0000_0000_00"
When '1', all the status bits in the register will be set.
162
Enable for wheel 12.
Configuration of wheel 12. "000" = normal, "100" = T1,
"101" = E1, others reserved.
Enable for wheel 13.
Configuration of wheel 13. "000" = normal, "100" = T1,
"101" = E1, others reserved.
Enable for wheel 14.
Configuration of wheel 14. "000" = normal, "100" = T1,
"101" = E1, others reserved.
Reserved. Must always be "0000"
Overflow in the RX SAR data memory access cache.
Fatal chip error.
Overflow in the data cell FIFO in external memory.
Description
Description
Description
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