mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 57

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mt90503

Manufacturer Part Number
mt90503
Description
2048vc Aal1 Sar
Manufacturer
Zarlink Semiconductor
Datasheet

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4.3
4.3.1
The purpose of the TX_SAR Module is to assemble TDM data bytes into ATM cells to be transmitted to the UTOPIA
Module. The TX_SAR Module has no external interfaces, and does not control any of the MT90503’s pins.
However, it is the connecting block between the TDM module and the UTOPIA Module in the data transmission
direction.
When the TX_SAR assembles ATM cells, it reads bytes from the circular buffers in data memory and uses these to
assemble the ATM cells.
In order to transmit CBR ATM cells correctly, a timing algorithm is used to ensure that the ATM cells are assembled
and transmitted at the defined data rate. This timing algorithm is implemented using the transmit event scheduler.
The transmit event scheduler is a construct in control memory that identifies the time ATM cells need to be
transmitted, and the circular buffer from which data for the ATM cell is to be retrieved. ATM cells are capable of
carrying a variable number of virtual channels. Therefore, the rate at which cells are transmitted is variable.
4.3.1.1
The type of ATM cells the TX_SAR supports includes AAL1, CBR-AAL0, and AAL5-VTOA. The transmit event
scheduler is capable of supporting the different data rates which are inherent to the different types of ATM cells.
Figure 23 - ATM Cell Formats shows the different formats for the ATM cells that the TX_SAR Module supports.
The TX_SAR is also capable of supporting hyperchannels (trunking) of up to 2048 channels per VC. In addition, it
can also support AAL0 and AAL5 trunking, providing the number of channels is divisible by the payload bytes.
TX_SAR Module
CSI SEQ CRC P
AAL1 with Pointer Cell
P
Overview
Payload Byte #44
Payload Byte #45
46 Payload Bytes
Payload Byte #1
Payload Byte #0
GFC
VPI
VCI
Support and Trunking for Different Types of ATM Cells
HEC
VCI
P-Byte
PTI CL
VPI
VCI
AAL1 without Pointer Cell
CSI SEQ CRC P
47 Payload Bytes
Payload Byte #45
Payload Byte #46
Payload Byte #1
Payload Byte #2
GFC
Payload Byte #0
VPI
VCI
HEC
VCI
Figure 23 - ATM Cell Formats
PTI CL
Zarlink Semiconductor Inc.
VPI
VCI
MT90503
57
48 Payload Bytes
Payload Byte #46
Payload Byte #47
Payload Byte #2
Payload Byte #3
GFC
Payload Byte #1
Payload Byte #0
VPI
VCI
AAL0 Cell
HEC
VCI
PTI CL
VPI
VCI
40 Payload Bytes
Payload Byte #39
Payload Byte #2
Payload Byte #3
GFC
Payload Byte #1
Payload Byte #0
VPI
VCI
CRC32 [31:24]
CRC32 [23:16]
CRC32 [15:8]
CRC32 [7:0]
Length [7:0]
Length [15:8]
AAL5 Cell
"00000000"
"00000000"
HEC
VCI
PTI CL
VPI
VCI
Data Sheet

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