mt90503 Zarlink Semiconductor, mt90503 Datasheet - Page 174

• Manufacturer Part Number: mt90503
• Description: 2048vc Aal1 Sar
• Manufacturer: Zarlink Semiconductor

Address: 828h
Label: adapsrts0_reg4
Reset Value: 0000h
Address: 82Ah
Label: adapsrts0_reg5
Reset Value: 0000h
Address: 82Ch
Label: adapsrts0_reg6
Reset Value: 0001h
adapsrts0_time_out_period
adapsrts0_adap_pnt_elim_x
adapsrts0_srts8m8c_div_p
reserved
Label
Label
Label
Position
Position
Position
Table 206 - Adaptive SRTS0 4 Register
Table 207 - Adaptive SRTS0 5 Register
Table 208 - Adaptive SRTS0 6 Register
15:0
15:8
15:0
Bit
Bit
7:0
Bit
Zarlink Semiconductor Inc.
Type
Type
Type
RW
RW
RW
RW
MT90503
174
The clock generated by the digital PLL (pclk at 8KHz)
must be divided by a number K in order to match the
interval of 8 SRTS carrying cells. For example, a 24
channel AAL1 structured fully filled channel would require
a K of (375 / 24) = 15.625 . K must then be converted to
the values P and Q using the following equation: K = P /
Q. No rouding errors must be made in this conversion.
This value defines the time-out period between two cells
in both adaptive and SRTS mode. Unit is 1024 mclk
cycles. 0000h will disabled checking.
In adaptive mode, this value defined how many points
will be deleted vs how many points will be kept and
written to external memory. It is defined as "keep 1 point
out of X".
Reserved. Must always be "0000_0000"
Description
Description
Description
Data Sheet