zl50058 Zarlink Semiconductor, zl50058 Datasheet - Page 46

• Manufacturer Part Number: zl50058
• Description: 12 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 48 Input And 48 Output Streams
• Manufacturer: Zarlink Semiconductor

4.5
Note that when the devices are operating in Backplane 32 Mbps mode, some of the output streams (the upper half
of the available streams) are unused. The BE bits all of the channels on those output streams will always be low.
Therefore, the upper BSTo pins are either driven HIGH or high impedance, in accordance with the value of the
BORS input signals, as shown in Table 2 on page 33.
The data (channel control bit) transmitted by BCSTo0-3 replicates the Backplane Output Enable (BE) bit of the
Backplane Connection Memory, with a LOW state indicating the channel to be set to high impedance. Refer to
“Backplane Connection Memory Bit Definition,” on page 61 for more details.
The BCSTo0-3 pins transmit serial data (channel control bits) at 16.384 Mbps, with each bit representing the
per-channel high impedance state for a specific stream. Four output streams are allocated to each control line as
follows:
•
•
•
•
The channel control bit location, within a frame period, for each channel of the Backplane output streams is
presented in Table 6, BCSo Allocation of Channel Control Bits to Output Streams (32 Mbps Mode)
The BCSTo0-3 pins output data at a constant data rate of 16.384Mbps and all output streams, BSTo0-15, operate
at a data rate of 32.768Mbps.
As an aid to the description, the channel control bit for a single channel on specific streams is presented, with
reference to Table 6:
1. The channel control bit corresponding to Stream 0, Channel 0, BSTo0_Ch0, is transmitted on BCSTo0 and is
2. The channel control bit corresponding to Stream 12, Channel 0, BSTo12_Ch0, is transmitted on BCSTo0 in
3. For stream BSTo4, the value of the channel control bit for Channel 511 will be transmitted during the C16o
4. For stream BSTo5, the value of the channel control bit for Channel 5 will be transmitted during the C16o clock
BCSTo0 outputs the channel control bits for streams BSTo0, 4, 8, and 12
BCSTo1 outputs the channel control bits for streams BSTo1, 5, 9, and 13
BCSTo2 outputs the channel control bits for streams BSTo2, 6, 10, and 14
BCSTo3 outputs the channel control bits for streams BSTo3, 7, 11, and 15
advanced, relative to the frame boundary, by ten periods (clock period number 2039) of C16o.
advance of the frame boundary by seven periods (clock period no. 2042) of output clock, C16o. Similarly, the
channel control bits for BSTo13_Ch0, BSTo14_Ch0 and BSTo15_Ch0 are advanced relative to the frame
boundary by seven periods of C16o, on BCSTo1, BCSTo2 and BCSTo3, respectively.
clock period number 2036 on BCSTo0.
period number 12 on BCSTo1.
BORS Asserted LOW, 32Mbps Mode
Zarlink Semiconductor Inc.
ZL50057/8
46
Data Sheet