zl50058 Zarlink Semiconductor, zl50058 Datasheet - Page 77

• Manufacturer Part Number: zl50058
• Description: 12 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 48 Input And 48 Output Streams
• Manufacturer: Zarlink Semiconductor

14.8
Addresses 0083
Sixteen Local Output Advancement Registers (LOAR0 to LOAR15) allow users to program the output advancement
for output data streams LSTo0 to LSTo15.
For 2 Mbps, 4 Mbps, 8 Mbps and 16 Mbps stream operation, the possible adjustment is -2 (15 ns), -4 (31 ns) or -6
(46 ns) cycles of the internal system clock (131.072 MHz).
For 32 Mbps stream operation, the possible adjustment is -1 (7.6 ns), -2 (15 ns) or -3 (23 ns) cycles of the internal
system clock (131.072 MHz).
The LOAR0 to LOAR15 registers are configured as follows:
Non-32 Mbps Mode, n = 0 to 7
(where n = 0 to 15 for Local
for Local 32 Mbps Mode)
Local Output Advancement Registers (LOAR0 to LOAR15)
Table 31 - Backplane Input Bit Delay and Sampling Point Programming Table (continued)
LOARn Bit
BID4
1
1
1
1
1
1
1
1
15:2
1:0
H
to 0092
BID3
1
1
1
1
1
1
1
1
Table 32 - Local Output Advancement Register (LOAR) Bits
H
.
BIDn
BID2
0
0
0
0
1
1
1
1
Reserved
LOA[1:0]
Name
BID1
0
0
1
1
0
0
1
1
Zarlink Semiconductor Inc.
ZL50057/8
BID0
Reset
0
1
0
1
0
1
0
1
Value
0
0
77
SMPL_MODE
Input Data
Bit Delay
Reserved
Must be set to 0 for normal operation
Local Output Advancement Value
= LOW
6 1/4
6 1/2
6 3/4
7 1/4
7 1/2
7 3/4
6
7
Input Data
Bit Delay
Description
6
6
6
6
7
7
7
7
SMPL_MODE
= HIGH
Input Data
Sampling
Point
3/4
4/4
1/4
2/4
3/4
4/4
1/4
2/4
Data Sheet