zl50058 Zarlink Semiconductor, zl50058 Datasheet - Page 82

• Manufacturer Part Number: zl50058
• Description: 12 K Channel Digital Switch With High Jitter Tolerance, Per Stream Rate Conversion 2, 4, 8, 16 Or 32 Mbps , 48 Input And 48 Output Streams
• Manufacturer: Zarlink Semiconductor

14.10.4
Address 00C6
Local BER Start Receive Register defines the input stream and start channel at which the BER sequence shall start
to be received. The LBSRR register is configured differently for Non-32 Mbps and 32 Mbps Modes:
14.10.5
Address 00C7
Local BER Count Register contains the number of counted errors. This register is read-only. The LBCR register is
configured as follows:
15:13
15:13
15:0
12:8
12:9
Bit
7:0
8:0
Bit
Bit
Local BER Start Receive Register (LBSRR)
Local BER Count Register (LBCR)
Table 40 - Local BER Start Receive Register (LBSRR) Bits for Non-32 Mbps Mode
LBC[15:0]
LBRSA[4:0]
LBRCA[7:0]
LBRSA[3:0]
LBRCA[8:0]
H
H
Reserved
Reserved
Table 41 - Local BER Start Receive Register (LBSRR) Bits for 32 Mbps Mode
Name
.
.
Name
Name
Reset
Value
Table 42 - Local BER Count Register (LBCR) Bits
0
Reset
Reset
Value
Value
0
0
0
0
0
0
Local Bit Error Rate Count
The binary value of the bits defines the Local Bit Error count.
If the number of errors exceeds the maximum counter value, this counter
will stay at FFFF
Reserved
Must be set to 0 for normal operation
Local BER Receive Stream Address Bits
The binary value of these bits refers to the Local input stream
configured to receive the BER data.
Local BER Receive Channel Address Bits
The binary value of these bits refers to the Local input channel at which
the BER data starts to be compared.
Reserved
Must be set to 0 for normal operation
Local BER Receive Stream Address Bits
The binary value of these bits refers to the Local input stream
configured to receive the BER data.
Local BER Receive Channel Address Bits
The binary value of these bits refers to the Local input channel at which
the BER data starts to be compared.
Zarlink Semiconductor Inc.
ZL50057/8
H
82
until the CBERL bit in the BERCR register clears it.
Description
Description
Description
Data Sheet