am45dl3208g Advanced Micro Devices, am45dl3208g Datasheet - Page 14

• Manufacturer Part Number: am45dl3208g
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram
• Manufacturer: Advanced Micro Devices

Legend: L = Logic Low = V
Input, Byte Mode, SADD = Flash Sector Address, A
Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = V
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = V
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
6. If WP#/ACC = V
12
Operation
(Notes 1, 2)
Read from Flash
Write to Flash
Standby
Output Disable
Flash Hardware
Reset
Sector Protect
(Note 5)
Sector
Unprotect
(Note 5)
Temporary
Sector
Unprotect
Read from
PSRAM
Write to PSRAM
If WP#/ACC = V
Block Protection and Unprotection” section.
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = V
Table 3. Device Bus Operations—Flash Byte Mode, CIOf = V
V
CE#f CE1#s CE2s OE# WE# SA
0.3 V
ACC
IL
IL
CC
H
H
X
X
L
L
L
L
L
, the two outermost boot sectors remain protected. If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC = V
±
(9V), the program time will be reduced by 40%.
IL
, CE1#s = V
IL
H
X
H
X
H
X
H
X
H
X
H
X
H
X
L
L
L
, H = Logic High = V
HH,
H
H
H
X
L
X
L
X
L
X
L
X
L
X
L
L
x
all sectors will be unprotected.
IL
and CE2s = V
H
X
H
X
H
H
X
X
L
L
P R E L I M I N A R Y
H
X
H
X
X
H
IH
L
L
L
L
, V
IN
ID
IH
= Address In (for Flash Byte Mode, DQ15 = A-1), D
X
X
X
X
X
X
X
X
X
X
Am45DL3208G
= 11.5–12.5 V, V
at the same time.
A1 = H,
A1 = H,
A6 = L,
A6 = L,
SADD,
A0 = L
SADD,
A0 = L
Addr.
A
A
A
A
A
X
X
X
IN
IN
IN
IN
IN
(Note 3)
LB#s
IH
H
H
HH
X
X
X
L
X
X
X
X
X
L
L
L
L
the boot sectors protection will be removed.
= 9.0 ± 0.5 V, X = Don’t Care, SA = PSRAM Address
(Note 3)
SS
UB#s
H
H
X
X
X
X
L
X
X
X
X
L
L
L
L
; PSRAM Word Mode, CIOs = V
IH
, the two outermost boot sector protection
RESET#
V
0.3 V
V
V
V
CC
H
H
H
H
H
L
ID
ID
ID
±
WP#/ACC
(Note 6)
(Note 6)
(Note 4)
(Note 3)
L/H
L/H
L/H
L/H
H
X
X
IN
= Data In, D
March 12, 2004
High-Z
High-Z
High-Z
High-Z
High-Z
DQ7–
D
D
D
DQ0
D
D
D
D
D
D
OUT
OUT
OUT
IN
IN
IN
IN
IN
IN
CC
DQ15–
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
OUT
D
D
DQ8
D
D
OUT
OUT
X
X
IN
IN
=