am45dl3208g Advanced Micro Devices, am45dl3208g Datasheet - Page 48
am45dl3208g
Manufacturer Part Number
am45dl3208g
Description
Stacked Multi-chip Package Mcp Flash Memory And Sram
Manufacturer
Advanced Micro Devices
Datasheet
1.AM45DL3208G.pdf
(66 pages)
- Current page: 48 of 66
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FLASH AC CHARACTERISTICS
Flash Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Flash Erase And Programming Performance” section for more information.
46
JEDEC
t
t
t
t
t
t
t
t
t
t
WHWH1
WHWH1
WHWH2
t
t
t
t
t
t
t
DVWH
WHDX
GHWL
EHWH
WHEH
WLWH
AVWL
WLAX
WHDL
GHEL
WLEL
ELWL
ELEH
AVAV
Parameter
t
t
t
t
WHWH1
WHWH1
WHWH2
t
t
t
t
t
t
t
OEPH
GHWL
t
Std
t
GHEL
BUSY
t
t
SR/W
t
t
t
t
WPH
t
ASO
t
t
OEH
t
t
VCS
t
AHT
WC
WH
WS
WP
AS
AH
DS
DH
CS
CH
CP
RB
Description
Write Cycle Time (Note 1)
Address Setup Time (WE# to Address)
Address Setup Time to OE# or
Polling
Address Hold Time (WE# to Address)
Address Hold Time From CE#f or OE# High During Toggle Bit
Polling
Data Setup Time
Data Hold Time
OE# Hold Time
Output Enable High During Toggle Bit Polling
Read Recovery Time Before Write (OE# High to CE#f Low)
Read Recovery Time Before Write (OE# High to WE# Low)
WE# Setup Time (CE#f to WE#)
CE#f Setup Time (WE# to CE#f)
WE# Hold Time (CE#f to WE#)
CE#f Hold Time (CE#f to WE#)
Write Pulse Width
CE#f Pulse Width
Write Pulse Width High
Latency Between Read and Write Operations
Programming Operation (Note 2)
Accelerated Programming Operation,
Word or Byte (Note 2)
Sector Erase Operation (Note 2)
V
Write Recovery Time From RY/BY#
Program/Erase Valid To RY/BY# Delay
CC
f Setup Time (Note 1)
P R E L I M I N A R Y
Read
Toggle and Data# Polling
Am45DL3208G
CE#f
Low During Toggle Bit
Word
Byte
Max
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
Typ
Typ
Min
Min
Speed Options
70
70
35
30
30
0.4
15
45
10
20
30
50
90
0
0
0
0
0
0
0
0
0
0
0
5
7
4
0
March 12, 2004
45
85
85
35
35
Unit
sec
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
ns
ns
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