am45dl3208g Advanced Micro Devices, am45dl3208g Datasheet - Page 3

• Manufacturer Part Number: am45dl3208g
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram
• Manufacturer: Advanced Micro Devices

Am45DL3208G
Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash
Memory and 8 Mbit (1 M x 8-Bit/512 K x 16-Bit) Pseudo Static RAM
DISTINCTIVE CHARACTERISTICS
MCP Features
Flash Memory Features
ARCHITECTURAL ADVANTAGES
PERFORMANCE CHARACTERISTICS
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Power supply voltage of 2.7 to 3.3 volt
High performance
— Access time as fast as 70 ns
Package
— 73-Ball FBGA
Operating Temperature
— –40°C to +85°C
Simultaneous Read/Write operations
— Data can be continuously read from one bank while
— Zero latency between read and write operations
Flexible Bank¥ architecture
— Read may occur in any of the three banks not being written
— Four banks may be grouped by customer to achieve desired
Manufactured on 0.17 µm process technology
SecSi™ (Secured Silicon) Sector: Extra 256 Byte sector
— Factory locked and identifiable: 16 bytes available for
— Customer lockable: Sector is one-time programmable. Once
Zero Power Operation
— Sophisticated power management circuits reduce power
Top or bottom boot sectors
Compatible with JEDEC standards
— Pinout and software compatible with single-power-supply
High performance
— Access time as fast as 70 ns
— Program time: 4 µs/word typical utilizing Accelerate function
Ultra low power consumption (typical values)
— 2 mA active read current at 1 MHz
— 10 mA active read current at 5 MHz
— 200 nA in standby or automatic sleep mode
Minimum 1 million write cycles guaranteed per sector
executing erase/program functions in another bank.
or erased.
bank divisions.
secure, random factory Electronic Serial Number; verifiable
as factory locked through autoselect function. ExpressFlash
option allows entire sector to be available for
factory-secured data
sector is locked, data cannot be changed.
consumed during inactive periods to nearly zero.
flash standard
PRELIMINARY
Refer to AMD’s Website (www.amd.com) for the latest information.
SOFTWARE FEATURES
HARDWARE FEATURES
Pseudo SRAM Features
20 year data retention at 125°C
— Reliable operation for the life of the system
Data Management Software (DMS)
— AMD-supplied software manages data programming,
— Eases historical sector erase flash limitations
Supports Common Flash Memory Interface (CFI)
Program/Erase Suspend/Erase Resume
— Suspends program/erase operations to allow
Data# Polling and Toggle Bits
— Provides a software method of detecting the status of
Unlock Bypass Program command
— Reduces overall programming time when issuing multiple
Any combination of sectors can be erased
Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or erase cycle
Hardware reset pin (RESET#)
— Hardware method of resetting the internal state machine to
WP#/ACC input pin
— Write protect (WP#) function protects sectors 0 and 1
— Acceleration (ACC) function accelerates program timing
Sector protection
— Hardware method of locking a sector, either in-system or
— Temporary Sector Unprotect allows changing data in
Power dissipation
— Operating: 30 mA maximum
— Standby: 100 µA maximum
CE1s# and CE2s Chip Select
Power down features using CE1s# and CE2s
Data retention supply voltage: 2.7 to 3.3 volt
Byte data control: LB#s (DQ7–DQ0), UB#s (DQ15–DQ8)
enabling EEPROM emulation
programming/erasing in same bank
program or erase cycles
program command sequences
completion
the read mode
(bottom boot) or 69 and 70 (top boot), regardless of sector
protect status
using programming equipment, to prevent any program or
erase operation within that sector
protected sectors in-system
Publication# 26460
Issue Date: March 12, 2004
Rev: B Amendment/+1