tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 105

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tmpr4937

Manufacturer Part Number
tmpr4937
Description
64-bit Tx System Risc
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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7.3.3
Address Mapping
Size field (EBCCRn.CS[3:0]) of the External Bus Channel Control Register to map to any physical
address.
address mask value selected from Table 7.3.2 from the Channel Size field value, the ampersand (&)
represents the AND operation, and the exclamation mark (!) represents the Logical NOT for each bit.
selected simultaneously with the SDRAM Controller or PCI Controller.
Each of the eight channels can use the Base Address field (EBCCRn.BA[35:20]) and the Channel
A channel is selected when the following equation becomes True.
In the above equation, paddr represents the accessed physical address, Mask[35:20] represents the
Operation is indeterminate when either multiple channels are selected simultaneously, or a channel is
paddr[35:20] & !Mask[35:20] == BA[35:20] & !Mask[35:20]
CS[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Table 7.3.2 Address Mask
Channel Size
Reserved
Reserved
Reserved
Reserved
Reserved
128 MB
256 MB
512 MB
16 MB
32 MB
64 MB
1 MB
2 MB
4 MB
8 MB
1 GB
7-5
Chapter 7 External Bus Controller
Address Mask[35:20]
0000_0000_0000_0000
0000_0000_0000_0001
0000_0000_0000_0011
0000_0000_0000_0111
0000_0000_0000_1111
0000_0000_0001_1111
0000_0000_0011_1111
0000_0000_0111_1111
0000_0000_1111_1111
0000_0001_1111_1111
0000_0011_1111_1111
Reserved
Reserved
Reserved
Reserved
Reserved

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