h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 22
h5tq4g43mmr
Manufacturer Part Number
h5tq4g43mmr
Description
4gb Ddr3 Sdram Ddp
Manufacturer
Hynix Semiconductor
Datasheet
1.H5TQ4G43MMR.pdf
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Rev. 0.1 /Aug 2008
6.3 Differential Output Slew Rate
With the reference load for timing measurements, output slew rate for falling and rising edges is defined and
measured between VOLdiff (AC) and VOHdiff (AC) for differential signals as shown in Table and Figure .
Differential Output Slew Rate Definition
Note:
Output slew rate is verified by design and characterization, and may not be subject to production test.
Table. Differential Output Slew Rate
***For Ron = RZQ/7 setting
Differential output slew rate for rising edge
Differential output slew rate for falling edge
Differential Output Slew Rate
Parameter
Description
Fig. Differential Output Slew Rate Definition
TFdiff
Delta
SRQdiff
Symbol
Differential Output Slew Rate Definition
VOHdiff (AC)
VOLdiff (AC)
From
Min
5
Measured
DDR3-1066
VOHdiff (AC)
VOLdiff (AC)
Max
TRdiff
To
Delta
10
vOLdiff(AC)
vOHdiff(AC)
O
Min
VOHdiff (AC)-VOLdiff (AC)
VOHdiff (AC)-VOLdiff (AC)
5
DDR3-1333
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
Defined by
DeltaTRdiff
DeltaTFdiff
Max
10
Units
V/ns
22
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