h5tq4g43mmr Hynix Semiconductor, h5tq4g43mmr Datasheet - Page 28
h5tq4g43mmr
Manufacturer Part Number
h5tq4g43mmr
Description
4gb Ddr3 Sdram Ddp
Manufacturer
Hynix Semiconductor
Datasheet
1.H5TQ4G43MMR.pdf
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Rev. 0.1 /Aug 2008
Output Driver Voltage and Temperature Sensitivity
These parameters may not be subject to production test. They are verified by design and characterization.
7.5 On-Die Termination (ODT) Levels and I-V Characteristics
7.5.1 On-Die Termination (ODT) Levels and I-V Characteristics
On-Die Termination effective resistance RTT is defined by bits A9, A6 and A2 of the MR1 Register.
ODT is applied to the DQ, DM, DQS/DQS and TDQS/TDQS (x8 devices only) pins.
A functional representation of the on-die termination is shown in Figure . The individual pull-up and pull-down resistors
(RTTPu and RTTPd) are defined as follows:
RTT
RTT
dR
dR
Pd
Pu
ON
ON
dVH
dTH
=
=
------------ -
V
---------------------------------
V
I
Out
DDQ
Out
I
O n - D ie T e r m in a t io n : D e f in it io n o f V o lt a g e s a n d C u r r e n t s
Out
C ir c u it r y
–
o t h e r
R C V ,
L ik e
V
T o
. ..
under the condition that RTTPu is turned off
Out
C h ip in T e r m in a t io n M o d e
under the condition that RTTPd is turned off
min
0
0
R T T p u
R T T p d
O D T
I p d
I p u
TBD
max
1.5
I O _ C T T _ D E F I N I T I O N _ 0 1
I o u t
I o u t = I p d - I p u
V S S Q
V o u t
V D D Q
D Q
H5TQ4G43MMR-xxC
H5TQ4G83MMR-xxC
%/mV
%/
unit
o
C
28
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