cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 25
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cn8236
Manufacturer Part Number
cn8236
Description
Atm Servicesar Plus With Xbr Traffic Management
Manufacturer
Mindspeed Technologies
Datasheet
1.CN8236.pdf
(443 pages)
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CN8236
ATM ServiceSAR Plus with xBR Traffic Management
28236-DSH-001-B
Table 6-20.
Table 6-21.
Table 6-22.
Table 6-23.
Table 6-24.
Table 6-25.
Table 6-26.
Table 6-27.
Table 6-28.
Table 6-29.
Table 6-30.
Table 6-31.
Table 6-32.
Table 6-33.
Table 6-34.
Table 7-1.
Table 7-2.
Table 7-3.
Table 7-4.
Table 7-5.
Table 7-6.
Table 7-7.
Table 7-8.
Table 7-9.
Table 9-1.
Table 9-2.
Table 10-1.
Table 10-2.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 12-4.
Table 12-5.
Table 12-6.
Table 12-7.
Table 12-8.
Table 13-1.
Table 13-2.
Table 14-1.
Table 14-2.
Table 14-3.
Table 14-4.
Table 14-5.
Table 14-6.
Table 14-7.
SCH_STATE for SCH_MODE = ABR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-51
ABR SCH_STATE Field Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-52
ABR Cell Decision Block (ACDB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-55
ABR Cell Type Actions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-55
ABR Cell Type Decision Vector (ACDV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-55
ABR Rate Decision Block (ARDB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56
ARDB Field Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56
ABR Rate Decision Vector (ARDV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-57
Exponent Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-57
Exponent Table Field Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-57
RS_QUEUE Entry—OAM-PM Reporting Information Ready for Transmission . . . . . . . . . . 6-59
RS_QUEUE Entry—Forward ER RM Cell Received . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-59
RS_QUEUE Entry—Backward ER RM Cell Received . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-59
RS_QUEUE Field Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-59
Scheduler Internal SRAM Memory Map (Head/Tail Pointers) . . . . . . . . . . . . . . . . . . . . . . . 6-60
OAM Functions of the ATM Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
VCI Values for F4 OAM Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
PTI Values for F5 OAM Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
OAM Type and Function Type Identifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-6
PM-OAM Field Initialization For Any PM_INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12
SEG_PM Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-15
SEG_PM Field Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-16
RSM_PM Table Entry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17
RSM_PM Table Field Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17
Memory Bank Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
Memory Size in Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6
Processor Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-3
Standalone Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-14
EEPROM Fields . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
ATM Physical Interface Mode Select (FRCFG[1:0]) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3
ATM Physical Interface Mode Select (UTOPIA1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-3
UTOPIA Mode Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-4
Slave UTOPIA Mode Interface Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-5
Cell Format 8 Bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-7
Cell Format 16 Bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-8
Cell Format, Tagging Enabled, 8 Bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-8
Cell Format, Tagging Enabled, 16 Bit Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-9
SEG_VCC_INDEX Format Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2
RSM_ROUTE_TAG Format Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13-2
Type Abbreviation Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-1
CN8236 Control and Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14-2
0x1c0—Host Processor Interrupt Status Register 0 (HOST_ISTAT0) . . . . . . . . . . . . . . . . 14-30
0x1c4—Host Processor Interrupt Status Register 1 (HOST_ISTAT1) . . . . . . . . . . . . . . . . 14-31
0x1d0—Host Interrupt Mask Register 0 (HOST_IMASK0) . . . . . . . . . . . . . . . . . . . . . . . . 14-32
0x1d4—Host Interrupt Mask Register 1 (HOST_IMASK1) . . . . . . . . . . . . . . . . . . . . . . . . 14-33
0x1e0—Local Processor Interrupt Status Register 0 (LP_ISTAT0) . . . . . . . . . . . . . . . . . . 14-35
Mindspeed Technologies
™
List of Tables
25
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