or3l165b Lattice Semiconductor Corp., or3l165b Datasheet - Page 12

• Manufacturer Part Number: or3l165b
• Description: Orca Or3lxxxb Series Field-programmable Gate Arrays
• Manufacturer: Lattice Semiconductor Corp.

ORCA OR3LxxxB Series FPGAs
Timing Characteristics
Configuration Timing
Table 4. General Configuration Mode Timing Characteristics
OR3LxxB Commercial: V
to 3.6 V, V
* Not applicable to asynchronous peripheral mode.
Note: T
12
All Configuration Modes
Master and Asynchronous Peripheral Modes
Microprocessor (MPI) Mode
Slave Serial Mode
Slave Parallel Mode
Symbol
T
T
T
T
T
T
HMODE
SMODE
T
T
T
T
T
PO
T
T
T
T
T
T
CCLK
CCLK
CCLK
PGW
RW
PO
PO
PR
PO
PO
PR
CL
CL
CL
CL
is triggered when V
DD
2 = 2.38 V to 2.63 V, –40 °C
M[3:0] Setup Time to INIT High
M[3:0] Hold Time from INIT High
RESET Pulse Width Low to Start Reconfiguration
PRGM Pulse Width Low to Start Reconfiguration
Power-on Reset Delay
CCLK Period (M3 = 0)
Configuration Latency (autoincrement mode):
Power-on Reset Delay
Configuration Latency (autoincrement mode):
Partial Reconfiguration (explicit mode):
Power-on Reset Delay
CCLK Period
Configuration Latency (autoincrement mode):
Power-on Reset Delay
CCLK Period:
Configuration Latency (normal mode):
Partial Reconfiguration (explicit mode):
OR3L165B (M3 = 0)
OR3L225B (M3 = 0)
OR3L165B
OR3L225B
OR3L165B
OR3L225B
OR3L165B
OR3L225B
OR3L165B
OR3L225B
OR3L165B
OR3L225B
DD
DD
reaches between 2.7 V and 3.0 V for the OR3LxxxB.
= 3.0 V to 3.6 V, V
(M3 = 1)
(M3 = 1)
(M3 = 1)
Parameter
<
T
A
DD
<
+85 °C.
2 = 2.38 V to 2.63 V, 0 °C
147,405
202,251
600.00
480.00
533.16
737.88
50.00
50.00
15.70
60.00
66.65
92.23
15.70
15.00
16.66
23.06
15.00
0.00
3.90
3.90
2.08
2.88
Min
1.0
1.2
69
81
<
T
A
<
70 °C; Industrial: V
1777.22*
1600.00
222.15*
307.45*
2459.8*
200.00
52.40
52.40
13.10
13.10
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Lattice Semiconductor
Data Addendum
March 2002
DD
write cycles
write cycles
write cycles
write cycles
µs/frame
µs/frame
= 3.0 V
Unit
ms
ms
ms
ms
ms
ms
ms
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns