hy5ps1g821m Hynix Semiconductor, hy5ps1g821m Datasheet - Page 38

• Manufacturer Part Number: hy5ps1g821m
• Description: 1gb Ddr2 Sdram
• Manufacturer: Hynix Semiconductor

Rev. 0.2 / Oct. 2005
2.6 Precharge Operation
The Precharge Command is used to precharge or close a bank that has been activated. The Precharge Com-
mand is triggered when CS, RAS and WE are low and CAS is high at the rising edge of the clock. The Pre-
charge Command can be used to precharge each bank independently or all banks simultaneously. Three
address bits A10, BA0 and BA1 for 512Mb are used to define which bank to precharge when the command is
issued.
Burst Read Operation Followed by Precharge
Minium Read to precharge command spacing to the same bank = AL + BL/2 clocks
For the earliest possible precharge, the precharge command may be issued on the rising edge which is
“Additive latency(AL) + BL/2 clocks” after a Read command. A new bank active (command) may be issued to
the same bank after the RAS precharge time (t
isfied.
The minimum Read to Precharge spacing has also to satisfy a minimum analog time from the rising clock
egde that initiates the last 4-bit prefetch of a Read to Precharge command. This time is called tRTP (Read to
Precharge). For BL = 4 this is the time from the actual read (AL after the Read command) to Precharge com-
mand. For BL = 8 this is the time from AL + 2 clocks after the Read to the Precharge command.
HIGH
LOW
LOW
LOW
LOW
A10
Bank Selection for Precharge by Address Bits
DON’T CARE
HIGH
HIGH
LOW
LOW
BA1
DON’T CARE
RP
). A precharge command cannot be issued until t
HIGH
HIGH
LOW
LOW
BA0
Precharged Bank(s)
Bank 0 only
Bank 1 only
Bank 2 only
Bank 3 only
All Banks
1HY5PS12421(L)M
HY5PS12821(L)M
Remarks
RAS
is sat-
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