A25L05PMF-50 AMICC [AMIC Technology], A25L05PMF-50 Datasheet - Page 16

• Manufacturer Part Number: A25L05PMF-50
• Description: 8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Page Program (PP)
The Page Program (PP) instruction allows bytes to be
programmed in the memory (changing bits from 1 to 0). Before
it can be accepted, a Write Enable (WREN) instruction must
previously have been executed. After the Write Enable (WREN)
instruction has been decoded, the device sets the Write Enable
Latch (WEL).
The Page Program (PP) instruction is entered by driving Chip
Select (
bytes and at least one data byte on Serial Data Input (D). If the
8 least significant address bits (A7-A0) are not all zero, all
transmitted data that goes beyond the end of the current page
are programmed from the start address of the same page (from
the address whose 8 least significant bits (A7-A0) are all zero).
Chip Select (
the sequence.
The instruction sequence is shown in Figure 10. If more than
256 bytes are sent to the device, previously latched data are
discarded and the last 256 data bytes are guaranteed to be
Figure 10. Page Program (PP) Instruction Sequence
PRELIMINARY
S
) Low, followed by the instruction code, three address
S
Note: Address bits A23 to A20 are Don’t Care.
) must be driven Low for the entire duration of
C
D
C
D
S
S
(May 2005, Version 0.0)
MSB
7 6 5 4 3 2 1
40
0 1
41
42
Data Byte 2
43
2 3 4
Instruction
44
45
46
5 6
0
47
MSB
7 6 5 4 3 2 1 0
48
7
MSB
23 22 21
8
49
Data Byte 3
50
9
24-Bit Address
10
51
15
52
programmed correctly within the same page. If less than 256
Data bytes are sent to device, they are correctly programmed
at the requested addresses without having any effects on the
other bytes of the same page.
Chip Select (
last data byte has been latched in, otherwise the Page
Program (PP) instruction is not executed.
As soon as Chip Select (
Program cycle (whose duration is t
Page Program cycle is in progress, the Status Register may be
read to check the value of the Write In Progress (WIP) bit. The
Write In Progress (WIP) bit is 1 during the self-timed Page
Program cycle, and is 0 when it is completed. At some
unspecified time before the cycle is completed, the Write
Enable Latch (WEL) bit is reset.
A Page Program (PP) instruction applied to a page which is
protected by the Block Protect (BP2, BP1, BP0) bits (see Table
2 and Table 1) is not executed.
3 2 1 0
3
28 29 30 31 32 33 34 35 36 37 38 39
53 54
55
S
MSB
7 6 5 4 3 2 1
MSB
) must be driven High after the eighth bit of the
7 6 5 4 3 2 1 0
Data Byte 256
Data Byte 1
S
) is driven High, the self-timed Page
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PP
) is initiated. While the
0
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