A25L05PMF-50 AMICC [AMIC Technology], A25L05PMF-50 Datasheet - Page 19

• Manufacturer Part Number: A25L05PMF-50
• Description: 8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Deep Power-down (DP)
Executing the Deep Power-down (DP) instruction is the only
way to put the device in the lowest consumption mode (the
Deep Power-down mode). It can also be used as an extra
software protection mechanism, while the device is not in
active use, since in this mode, the device ignores all Write,
Program and Erase instructions.
Driving Chip Select (
the device in the Standby mode (if there is no internal cycle
currently in progress). But this mode is not the Deep
Power-down mode. The Deep Power-down mode can only be
entered by executing the Deep Power-down (DP) instruction, to
reduce the standby current (from I
Characteristics Table.).
Once the device has entered the Deep Power-down mode, all
instructions are ignored except the Release from Deep
Power-down and Read Electronic Signature (RES) instruction.
This releases the device from this mode. The Release from
Deep Power-down and Read Electronic Signature (RES)
instruction also allows the Electronic Signature of the device to
be output on Serial Data Output (Q).
Figure 13. Deep Power-down (DP) Instruction Sequence
PRELIMINARY
S
C
D
(May 2005, Version 0.0)
S
) High deselects the device, and puts
0
CC1
1 2 3
to I
Instruction
CC2
, as specified in DC
4 5 6 7
18
The
Power-down, and the device always Powers-up in the Standby
mode.
The Deep Power-down (DP) instruction is entered by driving
Chip Select (
Data Input (D). Chip Select (
entire duration of the sequence. The instruction sequence is
shown in Figure 13.
Chip Select (
instruction code has been latched in, otherwise the Deep
Power-down (DP) instruction is not executed. As soon as Chip
Select (
supply current is reduced to I
mode is entered.
Any Deep Power-down (DP) instruction, while an Erase,
Program or Write cycle is in progress, is rejected without
having any effects on the cycle that is in progress.
Stand-by Mode
t
DP
Deep
S
) is driven High, it requires a delay of t
S
S
Power-down
) Low, followed by the instruction code on Serial
) must be driven High after the eighth bit of the
Deep Power-down Mode
AMIC Technology Corp.
mode
S
CC2
) must be driven Low for the
and the Deep Power-down
automatically
A25L80P
DP
before the
stops
at