A25L05PMF-50 AMICC [AMIC Technology], A25L05PMF-50 Datasheet - Page 7

• Manufacturer Part Number: A25L05PMF-50
• Description: 8 Mbit, Low Voltage, Serial Flash Memory With 50 MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Hold Condition
The Hold (
communications with the device without resetting the clocking
sequence. However, taking this signal Low does not terminate
any Write Status Register, Program or Erase cycle that is
currently in progress.
To enter the Hold condition, the device must be selected, with
Chip Select (
The Hold condition starts on the falling edge of the Hold
(
(C) being Low (as shown in Figure 3.).
The Hold condition ends on the rising edge of the Hold (
signal, provided that this coincides with Serial Clock (C) being
Low.
If the falling edge does not coincide with Serial Clock (C) being
Low, the Hold condition starts after Serial Clock (C) next goes
Low. Similarly, if the rising edge does not coincide with Serial
Clock (C) being Low, the Hold condition ends after Serial Clock
Figure 3. Hold Condition Activation
PRELIMINARY
Note: 1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.
Table 1. Protected Area Sizes
HOLD
BP2 Bit
Status Register Content
0
0
0
0
1
1
1
1
) signal, provided that this coincides with Serial Clock
S
HOLD
BP1 Bit
) Low.
0
1
1
0
0
1
1
0
(May 2005, Version 0.0)
) signal is used to pause any serial
HOLD
BP0 Bit
0
1
0
1
0
1
0
1
C
none
Upper sixteenth (sector 15)
Upper eighth (two sectors: 14 and 15)
Upper quarter (four sectors: 12 to 15)
Upper half (eight sectors: 8 to 15)
All sectors (eight sectors: 0 to 15)
All sectors (eight sectors: 0 to 15)
All sectors (eight sectors: 0 to 15)
Protected Area
(standard use)
Condition
HOLD
Hold
)
6
(C) next goes Low. This is shown in Figure 3.
During the Hold condition, the Serial Data Output (Q) is high
impedance, and Serial Data Input (D) and Serial Clock (C) are
Don’t Care.
Normally, the device is kept selected, with Chip Select (
driven Low, for the whole duration of the Hold condition. This is
to ensure that the state of the internal logic remains unchanged
from the moment of entering the Hold condition.
If Chip Select (
condition, this has the effect of resetting the internal logic of the
device. To restart communication with the device, it is
necessary to drive Hold (
Select (
the Hold condition.
Memory Content
S
(non-standard use)
) Low. This prevents the device from going back to
Condition
All sectors
Lower fifteen-eighths (fifteen sectors: 0 to 14)
Lower seven-eights (fourteen sectors: 0 to 13)
Lower three-quarters (twelve sectors: 0 to 11)
Lower half (eight sectors: 0 to 7)
none
none
none
Hold
S
) goes High while the device is in the Hold
1
HOLD
(sixteen sectors: 0 to 15)
Unprotected Area
AMIC Technology Corp.
) High, and then to drive Chip
A25L80P
S
)