CS42428 CIRRUS [Cirrus Logic], CS42428 Datasheet - Page 23

• Manufacturer Part Number: CS42428
• Description: 114 dB, 192kHz 8-Ch CODEC WITH PLL
• Manufacturer: CIRRUS [Cirrus Logic]

3.5.4.2
This configuration will support up to 8 channels of DAC data, 6 channels of ADC data and will handle up
to 20-bit samples at a sampling frequency of 96 kHz on all channels for both the DAC and ADC. The out-
put data stream of the internal and external ADCs is configured to use the ADC_SDOUT output and run
at the DAC Serial Port sample frequency.
Functional Mode Register (addr = 03h)
Interface Format Register (addr = 04h)
Misc. Control Register (addr = 05h)
ADC Mode
Set DAC_FMx = 00,01,10
Set ADC_FMx = 00,01,10
Set ADC_CLK_SEL = 1
Set DIFx bits to proper serial format
Set ADC_OLx bits = 00,01,10
Set DAC_OLx bits = 00,01
Set CODEC_SP M/S = 1
Set SAI_SP M/S = 1
Set EXT ADC SCLK = 1
OLM Config #2
Register / Bit Settings
Not One
Line Mode
One Line
Mode #1
One Line
Mode #2
CS5361
DAC_SCLK=64Fs
DAC_LRCK=SSM/DSM/QSM
ADC_SCLK=64Fs
ADC_LRCK=SSM/DSM/QSM
DAC_SCLK=64Fs
DAC_LRCK=SSM/DSM
ADC_SCLK=128Fs
ADC_LRCK=CX_LRCK
DAC_SCLK=64Fs
DAC_LRCK=SSM
ADC_SCLK=256Fs
ADC_LRCK=CX_LRCK
C S5361
SDO UT1
SDO UT2
SCLK
MCLK
LRCK
Not One Line Mode
Figure 14. OLM Configuration #2
R MCK
ADC IN1
ADC IN2
CS42428
AD C_S DOUT
DAC _SD IN1
DAC _SD IN2
DAC _SD IN3
DAC _SD IN4
D AC_LRCK
DA C_S CLK
AD C_SCLK
ADC _LRC K
DAC_LRCK can run at SSM, DSM or QSM independent of ADC_LRCK
ADC_LRCK can run at SSM, DSM or QSM independent of DAC_LRCK
Select ADC operating mode, see table below for valid combinations
Select DAC operating mode, see table below for valid combinations
DAC_SCLK=128Fs
DAC_LRCK=SSM
ADC_SCLK=64Fs
ADC_LRCK=SSM/DSM/QSM
DAC_SCLK=128Fs
DAC_LRCK=SSM
ADC_SCLK=128Fs
ADC_LRCK=CX_LRCK
Configure ADC_SDOUT to be clocked from the ADC_SP clocks.
Select the digital interface format when not in one line mode
One Line Mode #1
Identify external ADC clock source as DAC Serial Port.
not valid
Set Serial Audio Interface Port to master mode.
64Fs,128Fs
64Fs ,128Fs,
ADC Data
256Fs
Set CODEC Serial Port to master mode.
DAC Mode
SD IN _PO R T1
LRC K_P OR T2
SD OUT1_PORT2
SD OUT2_PORT2
SD OUT3_PORT2
SD OUT4_PORT2
MCLK
SC LK_PORT1
LRC K_PO R T1
SC LK_PO RT2
DIGITA L AUD IO
PROCESSOR
Description
One Line Mode #2
not valid
not valid
not valid
CS42428
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