CS42428 CIRRUS [Cirrus Logic], CS42428 Datasheet - Page 47

• Manufacturer Part Number: CS42428
• Description: 114 dB, 192kHz 8-Ch CODEC WITH PLL
• Manufacturer: CIRRUS [Cirrus Logic]

5.19
5.20
5.21
5.21.1 MUTEC POLARITY SELECT (MCPOLARITY)
UNLOCKM
UNLOCK1
UNLOCK0
Reserved
7
7
7
Interrupt Mask (address 21h)
Interrupt Mode MSB (address 22h)
Interrupt Mode LSB (address 23h)
MuteC Pin Control (address 28h)
Default = 00000000
Function:
The bits of this register serve as a mask for the interrupt sources found in the register “Interrupt Status
(address 20h) (Read Only)” on page 46. If a mask bit is set to 1, the error is unmasked, meaning that
its occurrence will affect the INT pin and the status register. If a mask bit is set to 0, the error is
masked, meaning that its occurrence will not affect the INT pin or the status register. The bit positions
align with the corresponding bits in the Interrupt Status register.
Default = 00000000
Function:
The two Interrupt Mode registers form a 2-bit code for each Interrupt Status register function. There
are three ways to set the INT pin active in accordance with the interrupt condition. In the Rising edge
active mode, the INT pin becomes active on the arrival of the interrupt condition. In the Falling edge
active mode, the INT pin becomes active on the removal of the interrupt condition. In Level active
mode, the INT interrupt pin becomes active during the interrupt condition. Be aware that the active
level(Active High or Low) only depends on the INT(1:0) bits located in the register “Interrupt Control
(address 1Eh)” on page 45.
00 - Rising edge active
01 - Falling edge active
10 - Level active
11 - Reserved
Default = 0
0 - Active low
1 - Active high
Function:
Determines the polarity of the MUTEC pin.
Reserved
Reserved
Reserved
Reserved
6
6
6
MCPolarity
Reserved
Reserved
Reserved
5
5
5
M_AOUTA1
Reserved
Reserved
Reserved
4
4
4
M_AOUTB1
Reserved
Reserved
Reserved
3
3
3
M_AOUTA2
M_AOUTB2
Reserved
Reserved
Reserved
2
2
2
M_AOUTA3
M_AOUTB3
OverFlowM
OF1
OF0
1
1
1
CS42428
M_AOUTB4
M_AOUTA4
Reserved
Reserved
Reserved
0
0
0
47