CS42428 CIRRUS [Cirrus Logic], CS42428 Datasheet - Page 32

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CS42428

Manufacturer Part Number
CS42428
Description
114 dB, 192kHz 8-Ch CODEC WITH PLL
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet

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5 REGISTER DESCRIPTION
5.1
5.1.1
5.1.2
5.2
5.2.1
5.2.2
32
Chip_ID3
INCR
7
7
Memory Address Pointer (MAP)
INCREMENT(INCR)
MEMORY ADDRESS POINTER (MAPX)
Chip I.D. and Revision Register (address 01h) (Read Only)
CHIP I.D. (CHIP_IDX)
CHIP REVISION (REV_IDX)
All registers are read/write except for I.D. and Revision Register, OMCK/PLL_CLK Ratio Register, Clock
Status and Interrupt Status Register which are read only. See the following bit definition tables for bit as-
signment information. The default state of each bit after a power-up sequence or reset is listed in each bit
description.
Not a register
Default = 1
Function:
Default = 0000001
Function:
Default = 1110
Function:
Default = 0001
Function:
Memory address pointer auto increment control
0 - MAP is not incremented automatically.
1 - Internal MAP is automatically incremented after each read or write.
Memory address pointer (MAP). Sets the register address that will be read or written by the control
port.
I.D. code for the CS42428. Permanently set to 1110.
CS42428 revision level. Revision C is coded as 0011.
Chip_ID2
MAP6
6
6
Chip_ID1
MAP5
5
5
CHIP_ID0
MAP4
4
4
Rev_ID3
MAP3
3
3
Rev_ID2
MAP2
2
2
Rev_ID1
MAP1
1
1
CS42428
Rev_ID0
MAP0
0
0

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