MC68306 Motorola, MC68306 Datasheet - Page 142

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MC68306

Manufacturer Part Number
MC68306
Description
Integrated EC000 Processor
Manufacturer
Motorola
Datasheet

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6.4.1.16 INTERRUPT VECTOR REGISTER (DUIVR). The DUIVR contains the 8-bit
vector number of the IRQ interrupt.
IVR7–IVR0—Interrupt Vector Bits
6.4.1.17 INPUT PORT REGISTER. The DUIP register shows the current state of the IPx
inputs.
IP5, IP4, IP3, IP2, IP1, IP0—Current State
6.4.1.18 OUTPUT PORT CONTROL REGISTER (DUOPCR). The DUOPCR configures
six bits of the 8-bit parallel DUOP for general-purpose use or for auxiliary functions serving
the communication channels.
6-34
Each module that generates interrupts can have an interrupt vector field. This 8-bit
number indicates the offset from the base of the vector table where the address of the
exception handler for the specified interrupt is located. The DUIVR is reset to $0F,
which indicates an uninitialized interrupt condition. See Section 4 EC000 Core
Processor for more information.
The information contained in these bits is latched and reflects the state of the input pins
at the time that the DUIP is read.
1 = The current state of the respective IP input is logic one.
0 = The current state of the respective IP input is logic zero.
These bits have the same function and value of the DUIPCR
bits 1 and 0.
IP5, IP4, and IP3 are not pinned out on the MC68306, and are
internally set to logic one.
DUIVR
Read /Write
DUIP
Read Only
RESET:
IVR7
7
0
7
1
1
IVR6
6
0
6
1
1
MC68306 USER'S MANUAL
IVR5
IP5
5
0
5
1
IVR4
IP4
4
0
4
1
NOTE
IVR3
IP3
3
1
3
1
IVR2
IP2
IP2
2
1
2
IVR1
IP1
IP1
1
1
1
IVR0
IP0
IP0
0
1
0
MOTOROLA

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