MC68306 Motorola, MC68306 Datasheet - Page 97

• Manufacturer Part Number: MC68306
• Description: Integrated EC000 Processor
• Manufacturer: Motorola

Port B pins can be individually programmed as either IRQ, IACK or parallel port signals.
To use any of the port B pins PB7–PB4 as interrupt request signals (IRQ6, IRQ5, IRQ3,
IRQ2) be sure the bit is programmed as an input. Interrupt enables are provided for each
interrupt level.
To use any of the port B pins PB3–PB0 as IACK6 , IACK5, IACK3, or IACK2, program the
port data bit and the autovector bit to zero.
To use any of the port B pins PB3–PB0 as port inputs, ensure that the autovector bit is
one.
Open-drain or open-source operation can be emulated by programming the appropriate
fixed data (e.g. 0 = open-drain) and toggling the direction control. PB7–PB4 pins can be
programmed as outputs even when enabled as interrupt inputs, allowing inputs to be
tested or emulated if the interrupt is open-drain or open-source. The active interrupt level
is the inverse of the IX register bit.
5.2.5.1 PORT PINS REGISTER
FFFFFFF4/5
5.2.5.2 PORT DIRECTION REGISTER
FFFFFFF2/3
PADIR7–0—Port A Direction Register Bit 7–0
PBDIR7–0—Port B Direction Register Bit 7–0
MOTOROLA
RESE
PADIR
RESE
PA7
PA7
15
T:
15
T:
The port pin register bits are the data at the port pins, regardless of pin direction. The
port pins register is read-only, writes are ignored.
7
0
The port direction register bits determine the direction of data flow at the port pins.
This bit determines the direction of data flow at port A pins 7 through 0.
0 = Input.
1 = Output.
PADIR
PA6
PA6
14
14
6
0
PADIR
PA5
PA5
13
13
5
0
PADIR
PA4
PA4
12
12
4
0
PADIR
PA3
PA3
11
11
3
0
PADIR
PA2
PA2
10
10
2
0
MC68306 USER'S MANUAL
PADIR
PA1
PA1
9
9
1
0
PADIR
PA0
PA0
8
8
0
0
PBDIR
PB7
PB7
7
7
7
0
PBDIR
PB6
PB6
6
6
6
0
PBDIR5
PB5
PB5
5
5
0
PBDIR4
PB4
PB4
4
4
0
PBDIR3
PB3
PB3
3
3
0
PBDIR2
PB2
PB2
2
2
0
SUPERVISOR ONLY
SUPERVISOR ONLY
PBDIR
PB1
PB1
1
1
1
0
PBDIR
PB0
PB0
5- 7
0
0
0
0