MC68306 Motorola, MC68306 Datasheet - Page 96

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MC68306

Manufacturer Part Number
MC68306
Description
Integrated EC000 Processor
Manufacturer
Motorola
Datasheet

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5.2.4.2 INTERRUPT STATUS REGISTER. An enabled, active interrupt appears as a one
in the interrupt status register, regardless of the active voltage level programmed at reset.
This register is read-only, writes to this register are ignored.
FFFFFFF8/9
IRQT—DUART Timer Interrupt State
IRQ7–1—Interrupt Request 7 through 1
IRQD—DUART Interrupt State
IX7–1—Reset (inactive) level of external interrupts 7 through 1.
5.2.5 I/O Port Registers
The following paragraphs describe the registers controlling the parallel ports. All port pins
are reset to input by a system reset, so pullup or pulldown resistors should be added
externally as needed. To enable a port A bit as an output, write a one to the appropriate
bit position of the port direction register. If a bit is programmed as an output, the data
written to the port data register appears in true form at the pin. The data read back from
the port pins register is the same level as appears at the pin. The data read from the port
data register is the last value written to the register, regardless of the level at the pin. The
port data register is not affected by any reset, so it should be initialized before enabling
any bits as outputs.
5-6
RESE
IRQT
15
T:
0
These bits indicate interrupt status for the external interrupts 7, 6, 5, 4, 3, 2, and 1.
This bit indicates the DUART interrupt state.
1 = Autovector.
0 = No interrupt.
1 = Interrupt asserted.
0 = No interrupt.
1 = Interrupt asserted.
0 = No DUART interrupt.
1 = DUART interrupt asserted
0 = Active high interrupt pin.
1 = Active low interrupt pin.
IRQ7
14
0
IRQ6
13
0
IRQ5
12
0
IRQ4
11
0
IRQ3
10
0
MC68306 USER'S MANUAL
IRQ2
9
0
IRQ1
8
0
IRQD
7
0
IRQ7
IX7
6
PB7/IR
IX6
Q6
5
PB6/IR
IX5
Q5
4
IRQ4
IX4
3
PB5/IR
IX3
Q3
2
SUPERVISOR ONLY
MOTOROLA
PB4/IR
IX2
Q2
1
IRQ1
IX1
0

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