AD9992_07 AD [Analog Devices], AD9992_07 Datasheet - Page 3

• Manufacturer Part Number: AD9992_07
• Description: 12-Bit CCD Signal Processor with Precision Timing Generator
• Manufacturer: AD [Analog Devices]

SPECIFICATIONS
Table 1.
Parameter
TEMPERATURE RANGE
POWER SUPPLY VOLTAGE INPUTS
POWER SUPPLY CURRENTS—40 MHz OPERATION
POWER SUPPLY CURRENTS—STANDBY MODE OPERATION
MAXIMUM CLOCK RATE (CLI)
1
Reducing the capacitive load and/or reducing the HVDD supply reduces the power dissipation. C
The total power dissipated by the HVDD (or RGVDD) supply can be approximated using the equation
Operating
Storage
AVDD (AFE Analog Supply)
TCVDD (Timing Core Supply)
CLIVDD (CLI Input Supply)
RGVDD (RG, HL Driver)
HVDD1/HVDD2 (H1 to H8 Drivers)
DVDD (Digital Logic)
DRVDD (Parallel Data Output Drivers)
IOVDD (Digital I/O)
XVVDD (Vertical Output Drivers)
CP1P8 (CP Supply Input)
LDOIN (LDO Supply Input)
AVDD (1.8 V)
TCVDD (1.8 V)
CLIVDD (3 V)
RGVDD (3.3 V, 20 pF RG Load, 20 pF HL Load)
HVDD1/HVDD2 (3.3 V, 480 pF Total Load on H1 to H8)
DVDD (1.8 V)
DRVDD (3 V, 10 pF Load on Each DOUT Pin)
IOVDD (3 V, Depends on Load and Output Frequency of Digital I/O)
XVVDD (3 V, Depends on Load and Output Frequency of XV Signals)
Standby1 Mode
Standby2 Mode
Standby3 Mode
Total HVDD Power = [C
L
× HVDD × Pixel Frequency] × HVDD
1
1
Rev. C | Page 3 of 92
L
is the total capacitance seen by all H-outputs.
Min
−25
−65
1.6
1.6
1.6
2.7
2.7
1.6
1.6
1.6
1.6
1.6
2.25
40
Typ
1.8
1.8
3.0
3.0
3.0
1.8
3.0
3.0
1.8
3.0
27
5
1.5
10
59
9.5
6
2
12
5
1.5
3.0
2
Max
+85
+150
2.0
2.0
3.6
3.6
3.6
2.0
3.6
3.6
3.6
2.0
3.6
AD9992
Unit
°C
°C
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
MHz