DAC1408D650C1 NXP [NXP Semiconductors], DAC1408D650C1 Datasheet - Page 27

• Manufacturer Part Number: DAC1408D650C1
• Description: Dual 14-bit DAC up to 650 Msps 2, 4 or 8 interpolating
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
DAC1408D650
Preliminary data sheet
10.6.1 NCO in 32-bit
10.6.2 Low-power NCO
10.6.3 Minus_3dB
10.6 Quadrature modulator and Numerically Controlled Oscillator (NCO)
10.7 x / (sin x)
The quadrature modulator allows the 14-bit I and Q data to be mixed with the carrier
signal generated by the NCO.
The frequency of the NCO is programmed over 32 bits and the sign of the sine component
can be inverted in order to operate positive or negative, lower or upper single sideband
up-conversion.
When using the NCO, the frequency can be set by the four registers FREQNCO_LSB,
FREQNCO_LISB, FREQNCO_UISB and FREQNCO_MSB over 32 bits.
The frequency for the NCO in 32-bit is calculated as follows:
where M is the decimal representation of FREQ_NCO[31:0].
The phase of the NCO can be set from 0° to 360° by both registers PHINCO_LSB and
PHINCO_MSB over 16 bits.
The default setting is f
When using the low-power NCO, the frequency can be set by the five MSBs of register
FREQNCO_MSB.
The frequency for the low-power NCO is calculated as follows:
where M is the decimal representation of FREQ_NCO[31:27].
The phase of the low-power NCO can be set by the five MSBs of the register
PHINCO_MSB.
During normal use, a full-scale pattern will also be full scale at the output of the DAC.
Nevertheless, when the I and Q data are simultaneously close to full scale, some clipping
can occur and the Minus_3dB function can be used to reduce the gain in the modulator by
3 dB. This is to keep a full scale range at the output of the DAC without added interferers.
The roll-off effect of the DAC causes a selectable FIR filter to be inserted to compensate
for the (sin x) / x effect. This filter introduces a DC loss of 3.4 dB. The coefficients are
represented in
f
f
NCO
NCO
=
=
M
--------------
M
--------------
2
×
2
32
×
5
DAC1408D; up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A
Table 12 “Inversion filter
f
All information provided in this document is subject to legal disclaimers.
s
f
s
NCO
Rev. 02 — 11 August 2010
= 96 MHz when f
coefficients”.
s
= 640 Msps and the default phase is 0°.
DAC1408D650
© NXP B.V. 2010. All rights reserved.
27 of 98
(1)
(2)