PIC18F13K50-E/P MICROCHIP [Microchip Technology], PIC18F13K50-E/P Datasheet - Page 130

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PIC18F13K50-E/P

Manufacturer Part Number
PIC18F13K50-E/P
Description
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F1XK50/PIC18LF1XK50
REGISTER 14-3:
DS41350C-page 128
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
PRSEN
R/W-0
PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPASE must be cleared by software to restart the PWM
PDC<6:0>: PWM Delay Count bits
PDCn = Number of F
R/W-0
PDC6
away; the PWM restarts automatically
PWM1CON: ENHANCED PWM CONTROL REGISTER
should transition active and the actual time it transitions active
W = Writable bit
‘1’ = Bit is set
R/W-0
PDC5
OSC
/4 (4 * T
R/W-0
PDC4
Preliminary
OSC
) cycles between the scheduled time when a PWM signal
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PDC3
R/W-0
PDC2
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
PDC1
R/W-0
PDC0
bit 0

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