FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 106

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FDC37N769_07

Manufacturer Part Number
FDC37N769_07
Description
3.3V Super I/O Controller with Infrared Support for Portable Applications
Manufacturer
SMSC [SMSC Corporation]
Datasheet
CR11
CR11 can only be accessed in the configuration state and after the CSR has been initialized to 11H. The default
value of this register after power up is 80H (Table 94). CR11 is a test control register and all bits must be treated as
Reserved. NOTE: all test modes are reserved for SMSC use. Activating test mode registers may produce undesired
results.
CR12 - CR13
CR12 - CR13 are reserved. Reserved registers cannot be written and return “0” when read. The default value of
these registers after power up is 00H.
CR14
CR14 can only be accessed in the configuration state and after the CSR has been initialized to 14H. CR14 shadows
the bits in the write-only FDC run-time DSR register (Table 95).
CR15
CR15 can only be accessed in the configuration state and after the CSR has been initialized to 15H. CR15 shadows
the bits in the write-only UART1 run-time FCR register (Table 96).
SMSC DS – FDC37N769
CR
CR
15
14
R
R
RESET
SOFT
TRIGGER
D7
RCVR
MSB
D7
BIT NO.
DOWN
PWR
D6
0
1
2
3
4
5
6
7
TRIGGER
Table 96 - CR15: UART1 FCR Shadow Register
RCVR
LSB
D6
Table 95 - CR14: DSR Shadow Register
Res.
D5
DATASHEET
BIT NAME
Test 16
Test 17
Test 18
Test 19
Test 20
Test 21
Test 22
Test 23
D5
Reserved
COMP
PRE-
Table 94 - CR11
D4
2
Page 106 of 137
D4
COMP
PRE-
RESERVED FOR SMSC USE
SELECT
D3
MODE
1
DMA
D3
DESCRIPTION
COMP
PRE-
D2
0
RESE
XMIT
FIFO
D2
T
SELECT
DATA
RATE
RESET
D1
RCVR
1
FIFO
D1
SELECT
ENABLE
DATA
RATE
FIFO
D0
D0
0
Defaul
Default
N/A
N/A
t
Rev. 02-16-07

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