FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 108

• Manufacturer Part Number: FDC37N769_07
• Description: 3.3V Super I/O Controller with Infrared Support for Portable Applications
• Manufacturer: SMSC [SMSC Corporation]

Upper Address Decode requirements: nCS=’0’ and A10=’0’ are required to qualify the GAMECS output.
CR03.0, the PWRGD/GAMECS control bit, overrides the selection made by the GAMECS Configuration Bits.
CR1F
CR1F can only be accessed in the configuration state and after the CSR has been initialized to 1FH.
value of this register after power up is 00H (Table 101). CR1F indicates the floppy disk Drive Type for each of four
floppy disk drives. The floppy disk Drive Type is used to map the three FDC DENSEL, DRATE1 and DRATE0
outputs onto two Super I/O output pins DRVDEN1 and DRVDEN0 (Table 102).
CR20
CR20 can only be accessed in the configuration state and after the CSR has been initialized to 20H. The default
value of this register after power up is 3CH (Table 103). CR20 is used to select the base address of the floppy disk
controller (FDC). The FDC base address can be set to 48 locations on 16 byte boundaries from 100H - 3F0H. To
disable the FDC set ADR9 and ADR8 to zero. Set CR20.[1:0] to 00b when writing the FDC Base Address.
FDC Address Decoding: nCS = ’0’ and A10 = ’0’ are required to access the FDC registers. A[3:0] are decoded as
0XXXb.
SMSC DS – FDC37N769
DT0
DRIVE TYPE
ADR9
0
0
1
1
DB7
DT0
D7
FDD3
DT1
0
1
0
1
ADR8
DT1
DB6
D6
DENSEL
DRATE1
nDENSEL
DRATE0
DRVDEN0
Table 103 - CR20: FDC Base Address Register
ADR7
CONFIGURATION
DT0
DB5
DB1
Table 100 - GAMECS Configuration Bits
D5
0
0
1
1
DRATE0
DRATE0
DRATE0
DRATE1
Table 102 - Drive Type Encoding
GAMECS
DATASHEET
FDD2
DRVDEN1
ADR6
DB0
Table 101 - CR1F
DB4
DT1
D4
0
1
0
1
Page 108 of 137
2/1 MB 5.25” FDDS
2/1.6/1 MB 3.5” (3-MODE)
PS/2
4/2/1 MB 3.5”
16 byte block decode,
8 Byte block decode,
GAMECS disabled
ADR[3:0] = XXXXb
ADR[3:0] = 0XXXb
ADR[3:0] = 0001b
ADR5
DB3
DT0
DESCRIPTION
1 Byte decode,
D3
FDD1
DRIVE TYPE DESCRIPTION
ADR4
DB2
DT1
D2
DB1
DT0
D1
0
FDD0
DB0
DT1
D0
0
The default
Rev. 02-16-07