FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 81

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FDC37N769_07

Manufacturer Part Number
FDC37N769_07
Description
3.3V Super I/O Controller with Infrared Support for Portable Applications
Manufacturer
SMSC [SMSC Corporation]
Datasheet
EXTENDED CAPABILITIES PARALLEL PORT
ECP provides a number of advantages, some of which are listed below. The individual features are explained in
greater detail in the remainder of this section.
Vocabulary
The following terms are used in this document:
assert
forward Host to Peripheral communication.
reverse
Pword
1
0
These terms may be considered synonymous:
Reference Document:
IEEE 1284 Extended Capabilities Port Protocol and ISA Interface Standard, Rev 1.09, Jan 7, 1993. This document is
available from Microsoft. The bit map of the Extended Parallel Port registers is shown in Table 65.
Note
Note
SMSC DS – FDC37N769
High performance half-duplex forward and reverse channel
Interlocked handshake, for fast reliable transfer
Optional single byte RLE compression for improved throughput (64:1)
Channel addressing for low-cost peripherals
Maintains link and data layer separation
Permits the use of active output drivers
Permits the use of adaptive signal timing
Peer-to-peer capability
PeriphClk, nAck
HostAck, nAutoFd
PeriphAck, Busy
nPeriphRequest, nFault
nReverseRequest, nInit
nAckReverse, PError
Xflag, Select
ECPMode, nSelectln
HostClk, nStrobe
1
2
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
A high level
A low level
These registers are available in all modes.
All FIFOs use one common 16 byte FIFO.
When
state.
Peripheral to Host communication.
A port word; equal in size to the width of the ISA interface. For this implementation, PWord is always 8
bits.
1
1
2
2
2
2
a
signal
Addr/RLE
compress
nBusy
PD7
D7
0
0
asserts it transitions to a “true” state, when a signal deasserts it transitions to a “false”
MODE
intrValue
nAck
PD6
D6
0
0
DATASHEET
Table 65 - ECP Registers
Direction
PError
PD5
D5
0
0
Page 81 of 137
Parallel Port Data FIFO
ECP Data FIFO
nErrIntrEn
ackIntEn
Test FIFO
Select
PD4
Address or RLE field
D4
1
0
SelectIn
dmaEn
nFault
PD3
D3
0
0
serviceIntr
PD2
nInit
D2
0
0
0
autofd strob
PD1
D1
full
0
0
0
empt
PD0
D0
0
e
0
0
y
Rev. 02-16-07

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