SAF-XE167F-48F66L INFINEON [Infineon Technologies AG], SAF-XE167F-48F66L Datasheet - Page 117

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SAF-XE167F-48F66L

Manufacturer Part Number
SAF-XE167F-48F66L
Description
16-Bit Single-Chip Real Time Signal Controller
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Part Number:
SAF-XE167F-48F66L AC
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4.6.6
The following parameters are applicable for communication through the JTAG debug
interface. The JTAG module is fully compliant with IEEE1149.1-2000.
Note: These parameters are not subject to production test but verified by design and/or
Table 35
Parameter
TCK clock period
TCK high time
TCK low time
TCK clock rise time
TCK clock fall time
TDI/TMS setup
to TCK rising edge
TDI/TMS hold
after TCK rising edge
TDO valid
after TCK falling edge
TDO high imped. to valid
from TCK falling edge
TDO valid to high imped.
from TCK falling edge
1) The falling edge on TCK is used to generate the TDO timing.
2) The setup time for TDO is given implicitly by the TCK cycle time.
Data Sheet
characterization.
JTAG Interface Timing
JTAG Interface Timing Parameters
(Operating Conditions apply)
1)
1)2)
1)
Symbol
t
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
8
9
10
SR
SR
SR
SR
SR
SR
SR
CC
CC
CC
CC
Min.
60
16
16
6
6
10
115
Values
Typ.
50
30
30
30
Max.
8
8
XE166 Family Derivatives
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Electrical Parameters
Test Condition
C
C
C
C
L
L
L
L
= 50 pF
= 20 pF
= 50 pF
= 50 pF
V2.1, 2008-08
XE167x

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