SAK-XC161CJ-16F20F INFINEON [Infineon Technologies AG], SAK-XC161CJ-16F20F Datasheet - Page 69

• Manufacturer Part Number: SAK-XC161CJ-16F20F
• Description: 16-Bi t Single-Chip Microcontroller Preliminary
• Manufacturer: INFINEON [Infineon Technologies AG]

Preliminary
Table 18
Parameter
Output delay rising edge
Valid for: address, CS, BHE
Output delay rising edge
Valid for: RD, WR, ALE
Output delay rising edge
Valid for: write data
Output delay falling edge
Valid for: address, CS, BHE
Output delay falling edge
Valid for: RD, WR, ALE
Output delay falling edge
Valid for: write data
Output hold time
Valid for: address, CS, BHE
Output hold time
Valid for: RD, WR, ALE
Output hold time
Valid for: write data
Input setup time
Valid for: read data, READY
Input hold time
Valid for: read data
Turn off delay
1)
Data Sheet
Read data are latched with the same (internal) clock edge that triggers the address change and the rising edge
of RD. Therefore address changes before the end of RD have no impact on (demultiplexed) read cycles. Read
data can be removed after the rising edge of RD.
External Bus Cycle Timing (Operating Conditions apply)
1)
, READY
65
Symbol
tc
tc
tc
tc
tc
tc
tc
tc
tc
tc
tc
tc
10
11
12
13
14
15
16
17
18
19
20
21
CC -1
CC -1
CC -1
CC -1
CC -1
CC -1
CC –
CC –
CC –
SR 15
SR 5
CC 0
min.
Timing Parameters
Limits
max.
6
6
6
10
10
10
2
2
2
–
–
5
Derivatives
V1.0, 2002-03
XC161
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns