HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 14

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HD6437101

Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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9.4
9.5
9.6
Section 10 Serial Communication Interface (SCI) ............................................283
10.1 Features............................................................................................................................. 283
10.2 Input/Output Pins .............................................................................................................. 285
10.3 Register Descriptions ........................................................................................................ 285
10.4 Operation in Asynchronous Mode .................................................................................... 301
Rev.1.00 Sep. 18, 2008 Page xiv of xxxiv
REJ09B0069-0100
9.3.2
9.3.3
Operation .......................................................................................................................... 276
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
Interrupt Source ................................................................................................................ 279
Usage Notes ...................................................................................................................... 279
9.6.1
9.6.2
9.6.3
9.6.4
9.6.5
9.6.6
9.6.7
9.6.8
10.3.1 Receive Shift Register (RSR) .............................................................................. 286
10.3.2 Receive Data Register (RDR) .............................................................................. 286
10.3.3 Transmit Shift Register (TSR) ............................................................................. 286
10.3.4 Transmit Data Register (TDR)............................................................................. 286
10.3.5 Serial Mode Register (SMR) ............................................................................... 287
10.3.6 Serial Control Register (SCR).............................................................................. 288
10.3.7 Serial Status Register (SSR) ................................................................................ 290
10.3.8 Serial Direction Control Register (SDCR)........................................................... 292
10.3.9 Bit Rate Register (BRR) ...................................................................................... 292
10.4.1 Data Transfer Format........................................................................................... 301
10.4.2 Receive Data Sampling Timing and Reception Margin in
10.4.3 Clock.................................................................................................................... 304
10.4.4 SCI Initialization (Asynchronous Mode) ............................................................. 305
10.4.5 Data Transmission (Asynchronous Mode)........................................................... 306
10.4.6 Serial Data Reception (Asynchronous Mode)...................................................... 308
Timer Control/Status Register (TCSR)................................................................ 273
Reset Control/Status Register (RSTCSR) ............................................................ 275
Watchdog Timer Mode ........................................................................................ 276
Interval Timer Mode............................................................................................ 277
Clearing Software Standby Mode ........................................................................ 278
Timing of Setting the Overflow Flag (OVF) ....................................................... 278
Timing of Setting the Watchdog Timer Overflow Flag (WOVF)........................ 279
Notes on Register Access..................................................................................... 279
TCNT Write and Increment Contention .............................................................. 281
Changing CKS2 to CKS0 Bit Values .................................................................. 281
Changing between Watchdog Timer/Interval Timer Modes................................ 281
System Reset by WDTOVF Signal...................................................................... 282
Internal Reset in Watchdog Timer Mode............................................................. 282
Manual Reset in Watchdog Timer Mode............................................................. 282
Notes on Using WDTOVF Pin ............................................................................ 282
Asynchronous Mode ............................................................................................ 303

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