HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 76

• Manufacturer Part Number: HD6437101
• Description: 32-Bit RISC Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 2 CPU
2.6
2.6.1
The CPU has five processing states: reset, exception processing, bus release, program execution,
and power-down. Figure 2.4 shows the transitions between the states.
Reset State: The CPU resets in the reset state. When the RES pin level goes low, the power-on
reset state is entered. When the RES pin is high and the MRES pin is low, the manual reset state is
entered. When the HSTBY pin is driven high and the RES pin level goes low, the power-on reset
state is entered.
Exception Processing State: The exception processing state is a transient state that occurs when
exception processing sources such as resets or interrupts alter the CPU’s processing state flow.
Rev.1.00 Sep. 18, 2008 Page 42 of 522
REJ09B0069-0100
Processing States
State Transitions
= 0
When an internal power-on
reset by WDT or internal
manual reset by
WDT occurs
= 1
Bus request
generated
From nay state
when
and
Bus release state
Sleep mode
Figure 2.4 Transitions between Processing States
= 0
=1
From any state when
Bus request
released
Bus request
released
Power-on reset state
= 0 and
Bus request
generated
Bus request
released
= 0
Bus request
released
Hardware standby mode
SSBY bit cleared
for SLEEP
instruction
Program execution state
processing
Exception
processing state
source
occurs
From nay state when
and
= 1
Exception
= 0,
= 0
Exception
processing
endws
=1
= 0,
Manual reset state
= 1,
Software standby mode
= 1
SSBY bit set
for SLEEP
instruction
Reset state
Power-down mode