HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 375

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HD6437101

Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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11.4.3
In single-cycle scan mode, A/D conversion is to be performed once on the specified channels (four
channels maximum in the SH7108 and eight channels maximum in the SH7109). Operations are
as follows.
1. When the ADST bit in ADCR is set to 1 by software, MTU, MMT, or external trigger input,
2. When A/D conversion for each channel is completed, the result is sequentially transferred to
3. When conversion of all the selected channels is completed, the ADF bit in ADCSR is set to 1.
4. After A/D conversion ends, the ADST bit is automatically cleared to 0 and the A/D converter
A/D conversion starts on the channel with the lowest number in the group (AN0, AN1, ...,
AN7).
the A/D data register corresponding to each channel.
If the ADIE bit is set to 1 at this time, an ADI interrupt is requested.
enters the idle state. When the ADST bit is cleared to 0 during A/D conversion, A/D
conversion stops and the A/D converter enters the idle state.
Single-Cycle Scan Mode
Rev.1.00 Sep. 18, 2008 Page 341 of 522
Section 11 A/D Converter
REJ09B0069-0100

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