HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 209
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HD6437101
Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6437101.pdf
(560 pages)
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8.4.6
In phase counting mode, the phase difference between two external clock inputs is detected and
TCNT counts up or down accordingly. This mode can be set for channels 1 and 2.
When phase counting mode is set, an external clock is selected as the counter input clock and
TCNT operates as an up/down-counter regardless of the setting of bits TPSC0 to TPSC2 and bits
CKEG0 and CKEG1 in TCR. However, the functions of bits CCLR0 and CCLR1 in TCR, and of
TIOR, TIER, and TGR, are valid, and input capture/compare match and interrupt functions can be
used.
This can be used for two-phase encoder pulse input.
If overflow occurs when TCNT is counting up, the TCFV flag in TSR is set; if underflow occurs
when TCNT is counting down, the TCFU flag is set.
The TCFD bit in TSR is the count direction flag. Reading the TCFD flag reveals whether TCNT is
counting up or down.
Table 8.32 shows the correspondence between external clock pins and channels.
Table 8.32 Phase Counting Mode Clock Input Pins
Channels
When channel 1 is set to phase counting mode
When channel 2 is set to phase counting mode
Example of Phase Counting Mode Setting Procedure: Figure 8.24 shows an example of the
phase counting mode setting procedure.
Phase Counting Mode
Figure 8.24 Example of Phase Counting Mode Setting Procedure
<Phase counting mode>
Select phase counting
Phase counting mode
Start count
mode
[1]
[2]
[1] Select phase counting mode with bits
[2] Set the CST bit in TSTR to 1 to start
MD3 to MD0 in TMDR.
the count operation.
Section 8 Multifunction Timer Pulse Unit (MTU)
Rev.1.00 Sep. 18, 2008 Page 175 of 522
TCLKA
A-Phase
TCLKC
External Clock Pins
B-Phase
TCLKB
TCLKD
REJ09B0069-0100
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