HD6437101 RENESAS [Renesas Technology Corp], HD6437101 Datasheet - Page 302

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HD6437101

Manufacturer Part Number
HD6437101
Description
32-Bit RISC Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 8 Multifunction Timer Pulse Unit (MTU)
8.9.4
Input Level Detection Operation
If the input conditions set by the ICSR1 occur on any of the POE pins, all high-current pins
become high-impedance state. However, only when the general input/output function or MTU
function is selected, the large-current pin is in the high-impedance state.
Falling Edge Detection: When a change from high to low level is input to the POE pins.
Low-Level Detection: Figure 8.114 shows the low-level detection operation. Sixteen continuous
low levels are sampled with the sampling clock established by the ICSR1. If even one high level is
detected during this interval, the low level is not accepted.
Furthermore, the timing when the large-current pins enter the high-impedance state from the
sampling clock is the same in both falling-edge detection and in low-level detection.
Rev.1.00 Sep. 18, 2008 Page 268 of 522
REJ09B0069-0100
Sampling
clock
POE input
PE9/
TIOC3B
When low level is
sampled at all points
When high level is
sampled at least once
Note: * Other large-current pins (PE11/TIOC3D, PE12/TIOC4A, PE13/TIOC4B/MRES, PE14/TIOC4C,
PE15/TIOC4D/IRQOUT) also go to the high-impedance state at the same timing.
Operation
1
1
Figure 8.114 Low-Level Detection Operation
8/16/128 clock
cycles
2
2
3
16
13
High-impedance
state*
Flag set
(POE received)
Flag not set

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